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100-mt7621-core-detect-hack.patch 1.7 KB

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  1. There is a variant of MT7621 which contains only one CPU core instead of 2.
  2. This is not reflected in the config register, so the kernel detects more
  3. physical cores, which leads to a hang on SMP bringup.
  4. Add a hack to detect missing cores.
  5. Signed-off-by: Felix Fietkau <nbd@nbd.name>
  6. --- a/arch/mips/kernel/smp-cps.c
  7. +++ b/arch/mips/kernel/smp-cps.c
  8. @@ -44,6 +44,11 @@ static unsigned core_vpe_count(unsigned
  9. return (cfg >> CM_GCR_Cx_CONFIG_PVPE_SHF) + 1;
  10. }
  11. +bool __weak plat_cpu_core_present(int core)
  12. +{
  13. + return true;
  14. +}
  15. +
  16. static void __init cps_smp_setup(void)
  17. {
  18. unsigned int ncores, nvpes, core_vpes;
  19. @@ -53,6 +58,8 @@ static void __init cps_smp_setup(void)
  20. ncores = mips_cm_numcores();
  21. pr_info("VPE topology ");
  22. for (c = nvpes = 0; c < ncores; c++) {
  23. + if (!plat_cpu_core_present(c))
  24. + continue;
  25. core_vpes = core_vpe_count(c);
  26. pr_cont("%c%u", c ? ',' : '{', core_vpes);
  27. --- a/arch/mips/ralink/mt7621.c
  28. +++ b/arch/mips/ralink/mt7621.c
  29. @@ -20,6 +20,7 @@
  30. #include <asm/mips-cpc.h>
  31. #include <asm/mach-ralink/ralink_regs.h>
  32. #include <asm/mach-ralink/mt7621.h>
  33. +#include <asm/mips-boards/launch.h>
  34. #include <pinmux.h>
  35. @@ -163,6 +164,20 @@ void __init ralink_of_remap(void)
  36. panic("Failed to remap core resources");
  37. }
  38. +bool plat_cpu_core_present(int core)
  39. +{
  40. + struct cpulaunch *launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
  41. +
  42. + if (!core)
  43. + return true;
  44. + launch += core * 2; /* 2 VPEs per core */
  45. + if (!(launch->flags & LAUNCH_FREADY))
  46. + return false;
  47. + if (launch->flags & (LAUNCH_FGO | LAUNCH_FGONE))
  48. + return false;
  49. + return true;
  50. +}
  51. +
  52. void prom_soc_init(struct ralink_soc_info *soc_info)
  53. {
  54. void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);