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E1700.dts 2.3 KB

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  1. /*
  2. * Device Tree file for the Linksys E1700
  3. *
  4. * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. /dts-v1/;
  11. #include "mt7620a.dtsi"
  12. #include <dt-bindings/input/input.h>
  13. / {
  14. compatible = "linksys,e1700", "ralink,mt7620a-soc";
  15. model = "Linksys E1700";
  16. gpio-keys-polled {
  17. compatible = "gpio-keys-polled";
  18. #address-cells = <1>;
  19. #size-cells = <0>;
  20. poll-interval = <20>;
  21. reset {
  22. label = "reset";
  23. gpios = <&gpio0 1 0>;
  24. linux,code = <KEY_RESTART>;
  25. };
  26. wps {
  27. label = "wps";
  28. gpios = <&gpio0 2 0>;
  29. linux,code = <KEY_WPS_BUTTON>;
  30. };
  31. };
  32. gpio-leds {
  33. compatible = "gpio-leds";
  34. power {
  35. label = "e1700:green:power";
  36. gpios = <&gpio0 10 1>;
  37. };
  38. wan {
  39. label = "e1700:green:wps";
  40. gpios = <&gpio0 12 1>;
  41. };
  42. };
  43. };
  44. &spi0 {
  45. status = "okay";
  46. m25p80@0 {
  47. #address-cells = <1>;
  48. #size-cells = <1>;
  49. compatible = "jedec,spi-nor";
  50. reg = <0>;
  51. spi-max-frequency = <10000000>;
  52. partition@0 {
  53. label = "u-boot";
  54. reg = <0x0 0x30000>;
  55. read-only;
  56. };
  57. partition@30000 {
  58. label = "config";
  59. reg = <0x30000 0x10000>;
  60. read-only;
  61. };
  62. factory: partition@40000 {
  63. label = "factory";
  64. reg = <0x40000 0x10000>;
  65. read-only;
  66. };
  67. partition@50000 {
  68. label = "firmware";
  69. reg = <0x50000 0x7b0000>;
  70. };
  71. };
  72. };
  73. &pinctrl {
  74. state_default: pinctrl0 {
  75. gpio {
  76. ralink,group = "i2c", "uartf";
  77. ralink,function = "gpio";
  78. };
  79. };
  80. };
  81. &ethernet {
  82. status = "okay";
  83. mtd-mac-address = <&factory 0x28>;
  84. pinctrl-names = "default";
  85. pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
  86. port@5 {
  87. status = "okay";
  88. mediatek,fixed-link = <1000 1 1 1>;
  89. phy-mode = "rgmii";
  90. };
  91. mdio-bus {
  92. status = "okay";
  93. phy0: ethernet-phy@0 {
  94. reg = <0>;
  95. phy-mode = "rgmii";
  96. };
  97. phy1: ethernet-phy@1 {
  98. reg = <1>;
  99. phy-mode = "rgmii";
  100. };
  101. phy2: ethernet-phy@2 {
  102. reg = <2>;
  103. phy-mode = "rgmii";
  104. };
  105. phy3: ethernet-phy@3 {
  106. reg = <3>;
  107. phy-mode = "rgmii";
  108. };
  109. phy4: ethernet-phy@4 {
  110. reg = <4>;
  111. phy-mode = "rgmii";
  112. };
  113. phy1f: ethernet-phy@1f {
  114. reg = <0x1f>;
  115. phy-mode = "rgmii";
  116. };
  117. };
  118. };
  119. &gsw {
  120. mediatek,port4 = "gmac";
  121. mediatek,mt7530 = <1>;
  122. };
  123. &wmac {
  124. ralink,mtd-eeprom = <&factory 0>;
  125. };