CS-QR10.dts 1.9 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. compatible = "ralink,mt7620a-soc";
  6. model = "Planex CS-QR10";
  7. gpio-leds {
  8. compatible = "gpio-leds";
  9. power {
  10. label = "cs-qr10:red:power";
  11. gpios = <&gpio1 4 1>;
  12. };
  13. };
  14. gpio-keys-polled {
  15. compatible = "gpio-keys-polled";
  16. #address-cells = <1>;
  17. #size-cells = <0>;
  18. poll-interval = <20>;
  19. s1 {
  20. label = "reset";
  21. gpios = <&gpio1 1 1>;
  22. linux,code = <KEY_RESTART>;
  23. };
  24. s2 {
  25. label = "wps";
  26. gpios = <&gpio1 3 1>;
  27. linux,code = <KEY_WPS_BUTTON>;
  28. };
  29. };
  30. };
  31. &gpio0 {
  32. status = "okay";
  33. };
  34. &gpio1 {
  35. status = "okay";
  36. };
  37. &gpio2 {
  38. status = "okay";
  39. };
  40. &gpio3 {
  41. status = "okay";
  42. };
  43. &i2c {
  44. status = "okay";
  45. };
  46. &i2s {
  47. status = "okay";
  48. pinctrl-names = "default";
  49. pinctrl-0 = <&pcm_i2s_pins>;
  50. };
  51. &spi0 {
  52. status = "okay";
  53. m25p80@0 {
  54. #address-cells = <1>;
  55. #size-cells = <1>;
  56. compatible = "jedec,spi-nor";
  57. reg = <0>;
  58. spi-max-frequency = <10000000>;
  59. partition@0 {
  60. label = "u-boot";
  61. reg = <0x0 0x30000>;
  62. read-only;
  63. };
  64. partition@30000 {
  65. label = "u-boot-env";
  66. reg = <0x30000 0x10000>;
  67. read-only;
  68. };
  69. factory: partition@40000 {
  70. label = "factory";
  71. reg = <0x40000 0x10000>;
  72. read-only;
  73. };
  74. partition@50000 {
  75. label = "firmware";
  76. reg = <0x50000 0x7b0000>;
  77. };
  78. };
  79. };
  80. &pcm {
  81. status = "okay";
  82. };
  83. &gdma {
  84. status = "okay";
  85. };
  86. &pinctrl {
  87. state_default: pinctrl0 {
  88. gpio {
  89. ralink,group = "spi refclk", "rgmii1";
  90. ralink,function = "gpio";
  91. };
  92. wdt {
  93. ralink,group = "wdt";
  94. ralink,function = "wdt refclk";
  95. };
  96. };
  97. };
  98. &ethernet {
  99. pinctrl-names = "default";
  100. pinctrl-0 = <&ephy_pins>;
  101. mtd-mac-address = <&factory 0x4>;
  102. mediatek,portmap = "llllw";
  103. };
  104. &gsw {
  105. ralink,port4 = "ephy";
  106. };
  107. &sdhci {
  108. status = "okay";
  109. };
  110. &ehci {
  111. status = "okay";
  112. };
  113. &ohci {
  114. status = "okay";
  115. };
  116. &wmac {
  117. ralink,mtd-eeprom = <&factory 0>;
  118. };
  119. &pcie {
  120. status = "okay";
  121. };