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@@ -43,14 +43,22 @@ unsigned long long tcr_physical_addr_size_bits(unsigned long long max_addr);
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* state.
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*
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* TCR.TxSZ is calculated as 64 minus the width of said address space.
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- * The value of TCR.TxSZ must be in the range 16 to 39 [1], which means that
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- * the virtual address space width must be in the range 48 to 25 bits.
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+ * The value of TCR.TxSZ must be in the range 16 to 39 [1] or 48 [2],
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+ * depending on Small Translation Table Support which means that
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+ * the virtual address space width must be in the range 48 to 25 or 16 bits.
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*
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* [1] See the ARMv8-A Architecture Reference Manual (DDI 0487A.j) for more
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* information:
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* Page 1730: 'Input address size', 'For all translation stages'.
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+ * [2] See section 12.2.55 in the ARMv8-A Architecture Reference Manual
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+ * (DDI 0487D.a)
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*/
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+/* Maximum value of TCR_ELx.T(0,1)SZ is 39 */
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#define MIN_VIRT_ADDR_SPACE_SIZE (ULL(1) << (U(64) - TCR_TxSZ_MAX))
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+
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+/* Maximum value of TCR_ELx.T(0,1)SZ is 48 */
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+#define MIN_VIRT_ADDR_SPACE_SIZE_TTST \
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+ (ULL(1) << (U(64) - TCR_TxSZ_MAX_TTST))
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#define MAX_VIRT_ADDR_SPACE_SIZE (ULL(1) << (U(64) - TCR_TxSZ_MIN))
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/*
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@@ -58,9 +66,13 @@ unsigned long long tcr_physical_addr_size_bits(unsigned long long max_addr);
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* virtual address space size. For a 4 KB page size,
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* - level 0 supports virtual address spaces of widths 48 to 40 bits;
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* - level 1 from 39 to 31;
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- * - level 2 from 30 to 25.
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+ * - level 2 from 30 to 22.
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+ * - level 3 from 21 to 16.
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*
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- * Wider or narrower address spaces are not supported. As a result, level 3
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+ * Small Translation Table (Armv8.4-TTST) support allows the starting level
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+ * of the translation table from 3 for 4KB granularity. See section 12.2.55 in
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+ * the ARMv8-A Architecture Reference Manual (DDI 0487D.a). In Armv8.3 and below
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+ * wider or narrower address spaces are not supported. As a result, level 3
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* cannot be used as initial lookup level with 4 KB granularity. See section
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* D4.2.5 in the ARMv8-A Architecture Reference Manual (DDI 0487A.j) for more
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* information.
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@@ -71,13 +83,14 @@ unsigned long long tcr_physical_addr_size_bits(unsigned long long max_addr);
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* is 1.
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*
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* Note that this macro assumes that the given virtual address space size is
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- * valid. Therefore, the caller is expected to check it is the case using the
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- * CHECK_VIRT_ADDR_SPACE_SIZE() macro first.
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+ * valid.
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*/
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#define GET_XLAT_TABLE_LEVEL_BASE(_virt_addr_space_sz) \
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(((_virt_addr_space_sz) > (ULL(1) << L0_XLAT_ADDRESS_SHIFT)) \
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? 0U \
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- : (((_virt_addr_space_sz) > (ULL(1) << L1_XLAT_ADDRESS_SHIFT)) \
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- ? 1U : 2U))
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+ : (((_virt_addr_space_sz) > (ULL(1) << L1_XLAT_ADDRESS_SHIFT)) \
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+ ? 1U \
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+ : (((_virt_addr_space_sz) > (ULL(1) << L2_XLAT_ADDRESS_SHIFT)) \
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+ ? 2U : 3U)))
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#endif /* XLAT_TABLES_AARCH64_H */
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