|
@@ -86,12 +86,6 @@
|
|
|
};
|
|
|
};
|
|
|
|
|
|
- rtc_out2_rmp_pins_a: rtc-out2-rmp-pins-0 {
|
|
|
- pins {
|
|
|
- pinmux = <STM32_PINMUX('I', 8, ANALOG)>; /* RTC_OUT2_RMP */
|
|
|
- };
|
|
|
- };
|
|
|
-
|
|
|
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
|
|
|
pins1 {
|
|
|
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
|
|
@@ -176,6 +170,18 @@
|
|
|
};
|
|
|
};
|
|
|
|
|
|
+ sdmmc2_d47_pins_b: sdmmc2-d47-1 {
|
|
|
+ pins {
|
|
|
+ pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
|
|
|
+ <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
|
|
|
+ <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
|
|
|
+ <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
|
|
|
+ slew-rate = <1>;
|
|
|
+ drive-push-pull;
|
|
|
+ bias-disable;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
sdmmc2_d47_pins_d: sdmmc2-d47-3 {
|
|
|
pins {
|
|
|
pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
|
|
@@ -213,33 +219,89 @@
|
|
|
|
|
|
uart7_pins_a: uart7-0 {
|
|
|
pins1 {
|
|
|
- pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
|
|
|
+ pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
|
|
|
bias-disable;
|
|
|
drive-push-pull;
|
|
|
slew-rate = <0>;
|
|
|
};
|
|
|
pins2 {
|
|
|
- pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
|
|
|
- <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
|
|
|
- <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
|
|
|
+ pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
|
|
|
+ <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
|
|
|
+ <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
|
|
|
bias-disable;
|
|
|
};
|
|
|
};
|
|
|
|
|
|
uart7_pins_b: uart7-1 {
|
|
|
pins1 {
|
|
|
- pinmux = <STM32_PINMUX('E', 8, AF7)>; /* USART7_TX */
|
|
|
+ pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
|
|
|
+ bias-disable;
|
|
|
+ drive-push-pull;
|
|
|
+ slew-rate = <0>;
|
|
|
+ };
|
|
|
+ pins2 {
|
|
|
+ pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
|
|
|
+ bias-disable;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ uart7_pins_c: uart7-2 {
|
|
|
+ pins1 {
|
|
|
+ pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
|
|
|
bias-disable;
|
|
|
drive-push-pull;
|
|
|
slew-rate = <0>;
|
|
|
};
|
|
|
pins2 {
|
|
|
- pinmux = <STM32_PINMUX('E', 7, AF7)>; /* USART7_RX */
|
|
|
+ pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
|
|
|
+ bias-disable;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ uart8_pins_a: uart8-0 {
|
|
|
+ pins1 {
|
|
|
+ pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
|
|
|
+ bias-disable;
|
|
|
+ drive-push-pull;
|
|
|
+ slew-rate = <0>;
|
|
|
+ };
|
|
|
+ pins2 {
|
|
|
+ pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
|
|
|
bias-disable;
|
|
|
};
|
|
|
};
|
|
|
|
|
|
usart2_pins_a: usart2-0 {
|
|
|
+ pins1 {
|
|
|
+ pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
|
|
|
+ <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
|
|
|
+ bias-disable;
|
|
|
+ drive-push-pull;
|
|
|
+ slew-rate = <0>;
|
|
|
+ };
|
|
|
+ pins2 {
|
|
|
+ pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
|
|
|
+ <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
|
|
|
+ bias-disable;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ usart2_pins_b: usart2-1 {
|
|
|
+ pins1 {
|
|
|
+ pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
|
|
|
+ <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
|
|
|
+ bias-disable;
|
|
|
+ drive-push-pull;
|
|
|
+ slew-rate = <0>;
|
|
|
+ };
|
|
|
+ pins2 {
|
|
|
+ pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
|
|
|
+ <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
|
|
|
+ bias-disable;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ usart2_pins_c: usart2-2 {
|
|
|
pins1 {
|
|
|
pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
|
|
|
<STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
|
|
@@ -255,6 +317,19 @@
|
|
|
};
|
|
|
|
|
|
usart3_pins_a: usart3-0 {
|
|
|
+ pins1 {
|
|
|
+ pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
|
|
|
+ bias-disable;
|
|
|
+ drive-push-pull;
|
|
|
+ slew-rate = <0>;
|
|
|
+ };
|
|
|
+ pins2 {
|
|
|
+ pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
|
|
|
+ bias-disable;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ usart3_pins_b: usart3-1 {
|
|
|
pins1 {
|
|
|
pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
|
|
|
<STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
|
|
@@ -269,7 +344,7 @@
|
|
|
};
|
|
|
};
|
|
|
|
|
|
- usart3_pins_b: usart3-1 {
|
|
|
+ usart3_pins_c: usart3-2 {
|
|
|
pins1 {
|
|
|
pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
|
|
|
<STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
|
|
@@ -284,7 +359,7 @@
|
|
|
};
|
|
|
};
|
|
|
|
|
|
- usbotg_hs_pins_a: usbotg_hs-0 {
|
|
|
+ usbotg_hs_pins_a: usbotg-hs-0 {
|
|
|
pins {
|
|
|
pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
|
|
|
};
|