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@@ -70,6 +70,16 @@
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interrupt-parent = <&intc>;
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ranges;
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+ timers12: timer@40006000 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "st,stm32-timers";
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+ reg = <0x40006000 0x400>;
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+ clocks = <&rcc TIM12_K>;
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+ clock-names = "int";
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+ status = "disabled";
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+ };
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+
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usart2: serial@4000e000 {
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compatible = "st,stm32h7-uart";
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reg = <0x4000e000 0x400>;
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@@ -127,8 +137,19 @@
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status = "disabled";
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};
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+ timers15: timer@44006000 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "st,stm32-timers";
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+ reg = <0x44006000 0x400>;
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+ clocks = <&rcc TIM15_K>;
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+ clock-names = "int";
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+ status = "disabled";
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+ };
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+
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sdmmc3: sdmmc@48004000 {
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- compatible = "st,stm32-sdmmc2";
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+ compatible = "arm,pl18x", "arm,primecell";
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+ arm,primecell-periphid = <0x00253180>;
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reg = <0x48004000 0x400>, <0x48005000 0x400>;
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clocks = <&rcc SDMMC3_K>;
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clock-names = "apb_pclk";
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@@ -139,6 +160,16 @@
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status = "disabled";
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};
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+ usbotg_hs: usb-otg@49000000 {
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+ compatible = "st,stm32mp1-hsotg", "snps,dwc2";
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+ reg = <0x49000000 0x10000>;
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+ clocks = <&rcc USBO_K>;
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+ clock-names = "otg";
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+ resets = <&rcc USBO_R>;
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+ reset-names = "dwc2";
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+ status = "disabled";
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+ };
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+
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rcc: rcc@50000000 {
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compatible = "st,stm32mp1-rcc", "syscon";
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reg = <0x50000000 0x1000>;
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@@ -176,6 +207,24 @@
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clocks = <&rcc SYSCFG>;
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};
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+ cryp1: cryp@54001000 {
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+ compatible = "st,stm32mp1-cryp";
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+ reg = <0x54001000 0x400>;
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+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&rcc CRYP1>;
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+ resets = <&rcc CRYP1_R>;
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+ status = "disabled";
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+ };
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+
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+ hash1: hash@54002000 {
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+ compatible = "st,stm32f756-hash";
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+ reg = <0x54002000 0x400>;
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+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&rcc HASH1>;
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+ resets = <&rcc HASH1_R>;
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+ status = "disabled";
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+ };
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+
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rng1: rng@54003000 {
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compatible = "st,stm32-rng";
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reg = <0x54003000 0x400>;
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@@ -208,7 +257,8 @@
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};
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sdmmc1: sdmmc@58005000 {
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- compatible = "st,stm32-sdmmc2";
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+ compatible = "arm,pl18x", "arm,primecell";
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+ arm,primecell-periphid = <0x00253180>;
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reg = <0x58005000 0x1000>, <0x58006000 0x1000>;
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clocks = <&rcc SDMMC1_K>;
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clock-names = "apb_pclk";
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@@ -220,7 +270,8 @@
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};
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sdmmc2: sdmmc@58007000 {
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- compatible = "st,stm32-sdmmc2";
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+ compatible = "arm,pl18x", "arm,primecell";
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+ arm,primecell-periphid = <0x00253180>;
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reg = <0x58007000 0x1000>, <0x58008000 0x1000>;
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clocks = <&rcc SDMMC2_K>;
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clock-names = "apb_pclk";
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