Commit History

Author SHA1 Message Date
  Ghennadi Procopciuc 8a4f840b1e feat(nxp-clk): enable the DDR clock 3 months ago
  Ghennadi Procopciuc 18c2b137f8 feat(nxp-clk): setup the DDR PLL 4 months ago
  Ghennadi Procopciuc 5300040bfd feat(nxp-clk): refactor clock enablement 4 months ago
  Ghennadi Procopciuc e4462dae81 feat(nxp-clk): enable UART clock 5 months ago
  Ghennadi Procopciuc 8653352ad7 feat(nxp-clk): add PERIPH PLL enablement 5 months ago
  Ghennadi Procopciuc b8ad8800b2 feat(nxp-clk): enable the XBAR clock 5 months ago
  Ghennadi Procopciuc d3869455a6 refactor(nxp-clk): organize early clocks in groups 5 months ago
  Ghennadi Procopciuc 7004f6782e feat(nxp-clk): enable the A53 clock 6 months ago
  Ghennadi Procopciuc 84e82085a1 feat(nxp-clk): add ARM PLL ODIV enablement 6 months ago
  Ghennadi Procopciuc b5101c452e feat(nxp-clk): add ARM PLL enablement 6 months ago
  Ghennadi Procopciuc 64e0c2260f feat(nxp-clk): set rate for clock muxes 6 months ago
  Ghennadi Procopciuc de950ef04f feat(nxp-clk): set rate for PLL divider objects 6 months ago
  Ghennadi Procopciuc 7ad4e2312f feat(nxp-clk): set rate for PLL objects 6 months ago
  Ghennadi Procopciuc 83af45042d feat(nxp-clk): set parent for ARM PLL and MC_CGM muxes 6 months ago
  Ghennadi Procopciuc 8ab3435749 feat(nxp-clk): add FXOSC clock enablement 6 months ago
  Ghennadi Procopciuc 66af5425a6 feat(s32g274a): enable BL2 early clocks 6 months ago