 Arvind Ram Prakash
|
f99a69c386
feat(dsu): save/restore DSU PMU register
|
11 mesi fa |
 Sona Mathew
|
9e51f15ed1
chore: simplify the macro names in ENABLE_FEAT mechanism
|
8 mesi fa |
 Manish Pandey
|
30f05b4f5d
feat(cpufeat): added few helper functions
|
10 mesi fa |
 Jacky Bai
|
278beb894a
feat(cpufeat): add memory retention bit define for CLUSTERPWRDN
|
1 anno fa |
 Boyan Karatotev
|
99506face1
fix(cm): set MDCR_EL3.{NSPBE, STE} explicitly
|
1 anno fa |
|
Boyan Karatotev
|
83a4dae1af
refactor(pmu): convert FEAT_MTPMU to C and move to persistent register init
|
1 anno fa |
|
Boyan Karatotev
|
c73686a11c
feat(pmu): introduce pmuv3 lib/extensions folder
|
1 anno fa |
 Andre Przywara
|
d156c5220a
feat(cpufeat): add AArch32 PAN detection support
|
1 anno fa |
|
Manish Pandey
|
4bd8c929b4
Merge changes I1bfa797e,I0ec7a70e into integration
|
1 anno fa |
 Elyes Haouas
|
1b491eead5
fix(tree): correct some typos
|
1 anno fa |
|
Sona Mathew
|
ffea3844c0
feat(errata_abi): errata management firmware interface
|
2 anni fa |
 Yann Gautier
|
bb2289142c
feat(debug): add AARCH32 CP15 fault registers
|
5 anni fa |
 johpow01
|
d0ec1cc437
feat(ccidx): update the do_dcsw_op function to support FEAT_CCIDX
|
3 anni fa |
 Chris Kay
|
81e2ff1f36
refactor(amu): detect architected counters at runtime
|
3 anni fa |
|
Chris Kay
|
33b9be6d75
refactor(amu): factor out register accesses
|
3 anni fa |
 Manish V Badarkhe
|
5de20ece38
feat(trf): initialize trap settings of trace filter control registers access
|
3 anni fa |
|
Manish V Badarkhe
|
2031d6166a
feat(sys_reg_trace): initialize trap settings of trace system registers access
|
3 anni fa |
|
johpow01
|
873d4241e3
Enable v8.6 AMU enhancements (FEAT_AMUv1p1)
|
4 anni fa |
 Javier Almansa Sobrino
|
0063dd1708
Add support for FEAT_MTPMU for Armv8.6
|
4 anni fa |
 Jimmy Brisson
|
d7b5f40823
Increase type widths to satisfy width requirements
|
4 anni fa |
 Alexei Fedorov
|
f3ccf036ec
TF-A AMU extension: fix detection of group 1 counters.
|
4 anni fa |
 Madhukar Pappireddy
|
9cf7f355ce
Provide a hint to power controller for DSU cluster power down
|
5 anni fa |
|
John Powell
|
3443a7027d
Fix MISRA C issues in BL1/BL2/BL31
|
4 anni fa |
|
Alexei Fedorov
|
c3e8b0be9b
AArch32: Disable Secure Cycle Counter
|
5 anni fa |
 John Tsichritzis
|
c250cc3b1b
SSBS: init SPSR register with default SSBS value
|
5 anni fa |
|
Yann Gautier
|
e1abd5600b
arch: add some defines for generic timer registers
|
5 anni fa |
 Ambroise Vincent
|
bd393704d2
Cortex-A53: Workarounds for 819472, 824069 and 827319
|
5 anni fa |
 Antonio Nino Diaz
|
ed4fc6f026
Disable processor Cycle Counting in Secure state
|
5 anni fa |
|
Antonio Nino Diaz
|
29a24134c1
drivers: generic_delay_timer: Assert presence of Generic Timer
|
5 anni fa |
|
Antonio Nino Diaz
|
2559b2c825
xlat v2: Dynamically detect need for CnP bit
|
5 anni fa |
