Elyes Haouas
|
1b491eead5
fix(tree): correct some typos
|
1 year ago |
Justin Chadwell
|
b7f6525db6
Enable -Wshadow always
|
5 years ago |
Justin Chadwell
|
79ca7807cc
Update rockchip platform to not rely on undefined overflow behaviour
|
5 years ago |
Antonio Nino Diaz
|
09d40e0e08
Sanitise includes across codebase
|
6 years ago |
Lin Huang
|
ff4735cfdf
rockchip/rk3399: Split M0 binary into two
|
6 years ago |
Jonathan Wright
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649c48f5dc
plat: fix switch statements to comply with MISRA rules
|
6 years ago |
Isla Mitchell
|
ee1ebbd18e
Fix order of remaining platform #includes
|
7 years ago |
Lin Huang
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a9059b9643
rockchip/rk3399: fix DRAM gate training issue
|
7 years ago |
dp-arm
|
82cb2c1ad9
Use SPDX license identifiers
|
7 years ago |
Caesar Wang
|
01178e82d6
rockchip/rk3399: changed printf/tf_printf for console output
|
7 years ago |
Derek Basehore
|
cdb6d5e564
rockchip: rk3399: Use tFC value instead of tRFC value
|
7 years ago |
Derek Basehore
|
5a5dc61713
rockchip: rk3399: Fix CAS latency setting
|
7 years ago |
Xing Zheng
|
43f52e92e4
rockchip: rk3399: disable training modules after DDR DFS
|
7 years ago |
Derek Basehore
|
50bde47fe3
rockchip: rk3399: Move DQS drive strength setting to M0
|
7 years ago |
Derek Basehore
|
d8484b1e57
rockchip: rk3399: Remove dram dfs optimization
|
7 years ago |
Lin Huang
|
ca9286c68a
rockchip: rk3399: improve the m0 enable flow
|
8 years ago |
Lin Huang
|
09f41f8ed6
rockchip: rk3399: dram: set all ddr frequency pll_postdiv values to 0
|
8 years ago |
Lin Huang
|
46b9dbce2f
rockchip: rk3399: enable CA training when do ddr dfs
|
8 years ago |
Derek Basehore
|
ad84ad49b3
rockchip: rk3399: Enable per CS training at 666MHz
|
8 years ago |
Derek Basehore
|
4bd1d3faed
rockchip: rk3399: add support for ddrfreq suspend/resume
|
7 years ago |
Xing Zheng
|
977001aa87
rk3399: dram: use PMU M0 to do ddr frequency scaling
|
8 years ago |
Derek Basehore
|
9a6376c8a1
rk3399: dram: making phy into dll bypass mode at low frequency
|
8 years ago |
Derek Basehore
|
f91b969c1e
rockchip: rk3399: dram: remove dram_init and dts_timing_receive function
|
8 years ago |
Caesar Wang
|
f9ba21bee5
rockchip: Change dmc register accesses to ATF style for rk3399
|
8 years ago |
Caesar Wang
|
613038bc20
rockchip: Break out common dram code for rk3399
|
8 years ago |