 Ryan Everett
|
3fb52e41fd
refactor(cpus): remove cpu specific errata funcs
|
6 months ago |
 Boyan Karatotev
|
285861d054
refactor(cpus): add Cortex-A57 errata framework information
|
1 year ago |
 John Powell
|
2e5d7a4b6b
fix(security): report CVE 2022 23960 missing for aarch32 A57 and A72
|
2 years ago |
 Ambroise Vincent
|
5bd2c24f17
Cortex-A57: Implement workaround for erratum 817169
|
5 years ago |
|
Ambroise Vincent
|
0f6fbbd2e5
Cortex-A57: Implement workaround for erratum 814670
|
5 years ago |
 Antonio Nino Diaz
|
09d40e0e08
Sanitise includes across codebase
|
6 years ago |
 Dimitris Papastamos
|
e086570815
aarch32: Implement static workaround for CVE-2018-3639
|
6 years ago |
|
Dimitris Papastamos
|
e4b34efa18
Workaround for CVE-2017-5715 for Cortex A9, A15 and A17
|
7 years ago |
 Matt Ma
|
5f70d8de5b
Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONS
|
7 years ago |
 Eleanor Bonnici
|
45b52c202f
Cortex-A57: Implement workaround for erratum 859972
|
7 years ago |
|
Eleanor Bonnici
|
80bcf98151
CPU: Correct names of implementation-defined aux regs
|
7 years ago |
|
Dimitris Papastamos
|
94f7d1e205
aarch32: Implement errata workarounds for Cortex A57
|
7 years ago |
 Varun Wadekar
|
fb7d32e588
Unique names for defines in the CPU libraries
|
7 years ago |
|
dp-arm
|
82cb2c1ad9
Use SPDX license identifiers
|
7 years ago |
 Yatharth Kochar
|
dc787588a5
AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor
|
8 years ago |
