security-advisory-tfv-4.rst 6.5 KB

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  1. Advisory TFV-4 (CVE-2017-9607)
  2. ==============================
  3. +----------------+-------------------------------------------------------------+
  4. | Title | Malformed Firmware Update SMC can result in copy or |
  5. | | authentication of unexpected data in secure memory in |
  6. | | AArch32 state |
  7. +================+=============================================================+
  8. | CVE ID | `CVE-2017-9607`_ |
  9. +----------------+-------------------------------------------------------------+
  10. | Date | 20 Jun 2017 |
  11. +----------------+-------------------------------------------------------------+
  12. | Versions | None (only between 22 May 2017 and 14 June 2017) |
  13. | Affected | |
  14. +----------------+-------------------------------------------------------------+
  15. | Configurations | Platforms that use AArch32 BL1 plus untrusted normal world |
  16. | Affected | firmware update code executing before BL31 |
  17. +----------------+-------------------------------------------------------------+
  18. | Impact | Copy or authentication of unexpected data in the secure |
  19. | | memory |
  20. +----------------+-------------------------------------------------------------+
  21. | Fix Version | `Pull Request #979`_ (merged on 14 June 2017) |
  22. +----------------+-------------------------------------------------------------+
  23. | Credit | ARM |
  24. +----------------+-------------------------------------------------------------+
  25. The ``include/lib/utils_def.h`` header file provides the
  26. ``check_uptr_overflow()`` macro, which aims at detecting arithmetic overflows
  27. that may occur when computing the sum of a base pointer and an offset. This
  28. macro evaluates to 1 if the sum of the given base pointer and offset would
  29. result in a value large enough to wrap around, which may lead to unpredictable
  30. behaviour.
  31. The macro code is at line 52, referring to the version of the code as of `commit
  32. c396b73`_:
  33. .. code:: c
  34. /*
  35. * Evaluates to 1 if (ptr + inc) overflows, 0 otherwise.
  36. * Both arguments must be unsigned pointer values (i.e. uintptr_t).
  37. */
  38. #define check_uptr_overflow(ptr, inc) \
  39. (((ptr) > UINTPTR_MAX - (inc)) ? 1 : 0)
  40. This macro does not work correctly for AArch32 images. It fails to detect
  41. overflows when the sum of its two parameters fall into the ``[2^32, 2^64 - 1]``
  42. range. Therefore, any AArch32 code relying on this macro to detect such integer
  43. overflows is actually not protected.
  44. The buggy code has been present in ARM Trusted Firmware (TF) since `Pull Request
  45. #678`_ was merged (on 18 August 2016). However, the upstream code was not
  46. vulnerable until `Pull Request #939`_ was merged (on 22 May 2017), which
  47. introduced AArch32 support for the Trusted Board Boot (TBB) feature. Before
  48. then, the ``check_uptr_overflow()`` macro was not used in AArch32 code.
  49. The vulnerability resides in the BL1 FWU SMC handling code and it may be
  50. exploited when *all* the following conditions apply:
  51. - Platform code uses TF BL1 with the ``TRUSTED_BOARD_BOOT`` build option.
  52. - Platform code uses the Firmware Update (FWU) code provided in
  53. ``bl1/bl1_fwu.c``, which is part of the TBB support.
  54. - TF BL1 is compiled with the ``ARCH=aarch32`` build option.
  55. In this context, the AArch32 BL1 image might fail to detect potential integer
  56. overflows in the input validation checks while handling the
  57. ``FWU_SMC_IMAGE_COPY`` and ``FWU_SMC_IMAGE_AUTH`` SMCs.
  58. The ``FWU_SMC_IMAGE_COPY`` SMC handler is designed to copy an image into secure
  59. memory for subsequent authentication. This is implemented by the
  60. ``bl1_fwu_image_copy()`` function, which has the following function prototype:
  61. .. code:: c
  62. static int bl1_fwu_image_copy(unsigned int image_id,
  63. uintptr_t image_src,
  64. unsigned int block_size,
  65. unsigned int image_size,
  66. unsigned int flags)
  67. ``image_src`` is an SMC argument and therefore potentially controllable by an
  68. attacker. A very large 32-bit value, for example ``2^32 -1``, may result in the
  69. sum of ``image_src`` and ``block_size`` overflowing a 32-bit type, which
  70. ``check_uptr_overflow()`` will fail to detect. Depending on its implementation,
  71. the platform-specific function ``bl1_plat_mem_check()`` might get defeated by
  72. these unsanitized values and allow the following memory copy operation, that
  73. would wrap around. This may allow an attacker to copy unexpected data into
  74. secure memory if the memory is mapped in BL1's address space, or cause a fatal
  75. exception if it's not.
  76. The ``FWU_SMC_IMAGE_AUTH`` SMC handler is designed to authenticate an image
  77. resident in secure memory. This is implemented by the ``bl1_fwu_image_auth()``
  78. function, which has the following function prototype:
  79. .. code:: c
  80. static int bl1_fwu_image_auth(unsigned int image_id,
  81. uintptr_t image_src,
  82. unsigned int image_size,
  83. unsigned int flags)
  84. Similarly, if an attacker has control over the ``image_src`` or ``image_size``
  85. arguments through the SMC interface and injects high values whose sum overflows,
  86. they might defeat the ``bl1_plat_mem_check()`` function and make the
  87. authentication module read data outside of what's normally allowed by the
  88. platform code or crash the platform.
  89. Note that in both cases, a separate vulnerability is required to leverage this
  90. vulnerability; for example a way to get the system to change its behaviour based
  91. on the unexpected secure memory accesses. Moreover, the normal world FWU code
  92. would need to be compromised in order to send a malformed FWU SMC that triggers
  93. an integer overflow.
  94. The vulnerability is known to affect all ARM standard platforms when enabling
  95. the ``TRUSTED_BOARD_BOOT`` and ``ARCH=aarch32`` build options. Other platforms
  96. may also be affected if they fulfil the above conditions.
  97. .. _CVE-2017-9607: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-9607
  98. .. _commit c396b73: https://github.com/ARM-software/arm-trusted-firmware/commit/c396b73
  99. .. _Pull Request #678: https://github.com/ARM-software/arm-trusted-firmware/pull/678
  100. .. _Pull Request #939: https://github.com/ARM-software/arm-trusted-firmware/pull/939
  101. .. _Pull Request #979: https://github.com/ARM-software/arm-trusted-firmware/pull/979