emmc_pboot_hal_memory_drv.h 2.9 KB

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  1. /*
  2. * Copyright (c) 2016 - 2020, Broadcom
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef PBOOT_HAL_MEMORY_EMMC_DRV_H
  7. #define PBOOT_HAL_MEMORY_EMMC_DRV_H
  8. #include <drivers/delay_timer.h>
  9. #include "emmc_chal_types.h"
  10. #include "emmc_chal_sd.h"
  11. #include "emmc_csl_sdprot.h"
  12. #include "emmc_csl_sdcmd.h"
  13. #include "emmc_csl_sd.h"
  14. #include "emmc_brcm_rdb_sd4_top.h"
  15. #define CLK_SDIO_DIV_52MHZ 0x0
  16. #define SYSCFG_IOCR4_PAD_10MA 0x38000000
  17. #define SDCLK_CNT_PER_MS 52000
  18. #define BOOT_ACK_TIMEOUT (50 * SDCLK_CNT_PER_MS)
  19. #define BOOT_DATA_TIMEOUT (1000 * SDCLK_CNT_PER_MS)
  20. #define EMMC_BOOT_OK 0
  21. #define EMMC_BOOT_ERROR 1
  22. #define EMMC_BOOT_TIMEOUT 2
  23. #define EMMC_BOOT_INVALIDIMAGE 3
  24. #define EMMC_BOOT_NO_CARD 4
  25. #define EMMC_USER_AREA 0
  26. #define EMMC_BOOT_PARTITION1 1
  27. #define EMMC_BOOT_PARTITION2 2
  28. #define EMMC_USE_CURRENT_PARTITION 3
  29. #define EMMC_BOOT_PARTITION_SIZE (128*1024)
  30. #define EMMC_BLOCK_SIZE 512
  31. #define EMMC_DMA_SIZE (4*1024)
  32. /*
  33. * EMMC4.3 definitions
  34. * Table 6 EXT_CSD access mode
  35. * Access
  36. * Bits Access Name Operation
  37. * 00 Command Set The command set is changed according to the Cmd Set field of
  38. * the argument
  39. * 01 Set Bits The bits in the pointed uint8_t are set,
  40. * according to the 1 bits in the Value field.
  41. * 10 Clear Bits The bits in the pointed uint8_t are cleared,
  42. * according to the 1 bits in the Value field.
  43. * 11 Write Byte The Value field is written into the pointed uint8_t.
  44. */
  45. #define SDIO_HW_EMMC_EXT_CSD_WRITE_BYTE 0X03000000
  46. /* Boot bus width1 BOOT_BUS_WIDTH 1 R/W [177] */
  47. #define SDIO_HW_EMMC_EXT_CSD_BOOT_BUS_WIDTH_OFFSET 0X00B10000
  48. /* Boot configuration BOOT_CONFIG 1 R/W [179] */
  49. #define SDIO_HW_EMMC_EXT_CSD_BOOT_CONFIG_OFFSET 0X00B30000
  50. /* Bus width mode BUS_WIDTH 1 WO [183] */
  51. #define SDIO_HW_EMMC_EXT_CSD_BUS_WIDTH_OFFSET 0X00B70000
  52. /*
  53. * Bit 6: BOOT_ACK (non-volatile)
  54. * 0x0 : No boot acknowledge sent (default)
  55. * 0x1 : Boot acknowledge sent during boot operation
  56. * Bit[5:3] : BOOT_PARTITION_ENABLE (non-volatile)
  57. * User selects boot data that will be sent to master
  58. * 0x0 : Device not boot enabled (default)
  59. * 0x1 : Boot partition 1 enabled for boot
  60. * 0x2 : Boot partition 2 enabled for boot
  61. * 0x3-0x6 : Reserved
  62. * 0x7 : User area enabled for boot
  63. * Bit[2:0] : BOOT_PARTITION_ACCESS
  64. * User selects boot partition for read and write operation
  65. * 0x0 : No access to boot partition (default)
  66. * 0x1 : R/W boot partition 1
  67. * 0x2 : R/W boot partition 2
  68. * 0x3-0x7 : Reserved
  69. */
  70. #define SDIO_HW_EMMC_EXT_CSD_BOOT_ACC_BOOT1 0X00000100
  71. #define SDIO_HW_EMMC_EXT_CSD_BOOT_ACC_BOOT2 0X00000200
  72. #define SDIO_HW_EMMC_EXT_CSD_BOOT_ACC_USER 0X00000000
  73. #define SDIO_HW_EMMC_EXT_CSD_BOOT_EN_BOOT1 0X00004800
  74. #define SDIO_HW_EMMC_EXT_CSD_BOOT_EN_BOOT2 0X00005000
  75. #define SDIO_HW_EMMC_EXT_CSD_BOOT_EN_USER 0X00007800
  76. #define SD_US_DELAY(x) udelay(x)
  77. #endif