common_def.h 4.0 KB

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  1. /*
  2. * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef COMMON_DEF_H
  7. #define COMMON_DEF_H
  8. #include <common/bl_common.h>
  9. #include <lib/utils_def.h>
  10. #include <lib/xlat_tables/xlat_tables_defs.h>
  11. #include <platform_def.h>
  12. #define SZ_32 U(0x00000020)
  13. #define SZ_64 U(0x00000040)
  14. #define SZ_128 U(0x00000080)
  15. #define SZ_256 U(0x00000100)
  16. #define SZ_512 U(0x00000200)
  17. #define SZ_1K U(0x00000400)
  18. #define SZ_2K U(0x00000800)
  19. #define SZ_4K U(0x00001000)
  20. #define SZ_8K U(0x00002000)
  21. #define SZ_16K U(0x00004000)
  22. #define SZ_32K U(0x00008000)
  23. #define SZ_64K U(0x00010000)
  24. #define SZ_128K U(0x00020000)
  25. #define SZ_256K U(0x00040000)
  26. #define SZ_512K U(0x00080000)
  27. #define SZ_1M U(0x00100000)
  28. #define SZ_2M U(0x00200000)
  29. #define SZ_4M U(0x00400000)
  30. #define SZ_8M U(0x00800000)
  31. #define SZ_16M U(0x01000000)
  32. #define SZ_32M U(0x02000000)
  33. #define SZ_64M U(0x04000000)
  34. #define SZ_128M U(0x08000000)
  35. #define SZ_256M U(0x10000000)
  36. #define SZ_512M U(0x20000000)
  37. #define SZ_1G U(0x40000000)
  38. #define SZ_2G U(0x80000000)
  39. /******************************************************************************
  40. * Required platform porting definitions that are expected to be common to
  41. * all platforms
  42. *****************************************************************************/
  43. /*
  44. * Platform binary types for linking
  45. */
  46. #ifdef __aarch64__
  47. #define PLATFORM_LINKER_FORMAT "elf64-littleaarch64"
  48. #define PLATFORM_LINKER_ARCH aarch64
  49. #else
  50. #define PLATFORM_LINKER_FORMAT "elf32-littlearm"
  51. #define PLATFORM_LINKER_ARCH arm
  52. #endif /* __aarch64__ */
  53. /*
  54. * Generic platform constants
  55. */
  56. #define FIRMWARE_WELCOME_STR "Booting Trusted Firmware\n"
  57. #define BL2_IMAGE_DESC { \
  58. .image_id = BL2_IMAGE_ID, \
  59. SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, \
  60. VERSION_2, image_info_t, 0), \
  61. .image_info.image_base = BL2_BASE, \
  62. .image_info.image_max_size = BL2_LIMIT - BL2_BASE,\
  63. SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, \
  64. VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),\
  65. .ep_info.pc = BL2_BASE, \
  66. }
  67. /*
  68. * The following constants identify the extents of the code & read-only data
  69. * regions. These addresses are used by the MMU setup code and therefore they
  70. * must be page-aligned.
  71. *
  72. * When the code and read-only data are mapped as a single atomic section
  73. * (i.e. when SEPARATE_CODE_AND_RODATA=0) then we treat the whole section as
  74. * code by specifying the read-only data section as empty.
  75. *
  76. * BL1 is different than the other images in the sense that its read-write data
  77. * originally lives in Trusted ROM and needs to be relocated in Trusted SRAM at
  78. * run-time. Therefore, the read-write data in ROM can be mapped with the same
  79. * memory attributes as the read-only data region. For this reason, BL1 uses
  80. * different macros.
  81. *
  82. * Note that BL1_ROM_END is not necessarily aligned on a page boundary as it
  83. * just points to the end of BL1's actual content in Trusted ROM. Therefore it
  84. * needs to be rounded up to the next page size in order to map the whole last
  85. * page of it with the right memory attributes.
  86. */
  87. #if SEPARATE_CODE_AND_RODATA
  88. #define BL1_CODE_END BL_CODE_END
  89. #define BL1_RO_DATA_BASE BL_RO_DATA_BASE
  90. #define BL1_RO_DATA_END round_up(BL1_ROM_END, PAGE_SIZE)
  91. #if BL2_IN_XIP_MEM
  92. #define BL2_CODE_END BL_CODE_END
  93. #define BL2_RO_DATA_BASE BL_RO_DATA_BASE
  94. #define BL2_RO_DATA_END round_up(BL2_ROM_END, PAGE_SIZE)
  95. #endif /* BL2_IN_XIP_MEM */
  96. #else
  97. #define BL_RO_DATA_BASE UL(0)
  98. #define BL_RO_DATA_END UL(0)
  99. #define BL1_CODE_END round_up(BL1_ROM_END, PAGE_SIZE)
  100. #if BL2_IN_XIP_MEM
  101. #define BL2_RO_DATA_BASE UL(0)
  102. #define BL2_RO_DATA_END UL(0)
  103. #define BL2_CODE_END round_up(BL2_ROM_END, PAGE_SIZE)
  104. #endif /* BL2_IN_XIP_MEM */
  105. #endif /* SEPARATE_CODE_AND_RODATA */
  106. #if MEASURED_BOOT
  107. /*
  108. * Start critical data Ids from 2^32/2 reserving Ids from 0 to (2^32/2 - 1)
  109. * for Images, It is a critical data Id base for all platforms.
  110. */
  111. #define CRITICAL_DATA_ID_BASE U(0x80000000)
  112. #endif /* MEASURED_BOOT */
  113. #endif /* COMMON_DEF_H */