psci_stat.c 7.7 KB

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  1. /*
  2. * Copyright (c) 2016-2019, Arm Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <assert.h>
  7. #include <platform_def.h>
  8. #include <common/debug.h>
  9. #include <plat/common/platform.h>
  10. #include "psci_private.h"
  11. #ifndef PLAT_MAX_PWR_LVL_STATES
  12. #define PLAT_MAX_PWR_LVL_STATES 2U
  13. #endif
  14. /* Following structure is used for PSCI STAT */
  15. typedef struct psci_stat {
  16. u_register_t residency;
  17. u_register_t count;
  18. } psci_stat_t;
  19. /*
  20. * Following is used to keep track of the last cpu
  21. * that goes to power down in non cpu power domains.
  22. */
  23. static int last_cpu_in_non_cpu_pd[PSCI_NUM_NON_CPU_PWR_DOMAINS] = {
  24. [0 ... PSCI_NUM_NON_CPU_PWR_DOMAINS - 1U] = -1};
  25. /*
  26. * Following are used to store PSCI STAT values for
  27. * CPU and non CPU power domains.
  28. */
  29. static psci_stat_t psci_cpu_stat[PLATFORM_CORE_COUNT]
  30. [PLAT_MAX_PWR_LVL_STATES];
  31. static psci_stat_t psci_non_cpu_stat[PSCI_NUM_NON_CPU_PWR_DOMAINS]
  32. [PLAT_MAX_PWR_LVL_STATES];
  33. /*
  34. * This functions returns the index into the `psci_stat_t` array given the
  35. * local power state and power domain level. If the platform implements the
  36. * `get_pwr_lvl_state_idx` pm hook, then that will be used to return the index.
  37. */
  38. static int get_stat_idx(plat_local_state_t local_state, unsigned int pwr_lvl)
  39. {
  40. int idx;
  41. if (psci_plat_pm_ops->get_pwr_lvl_state_idx == NULL) {
  42. assert(PLAT_MAX_PWR_LVL_STATES == 2U);
  43. if (is_local_state_retn(local_state) != 0)
  44. return 0;
  45. assert(is_local_state_off(local_state) != 0);
  46. return 1;
  47. }
  48. idx = psci_plat_pm_ops->get_pwr_lvl_state_idx(local_state, pwr_lvl);
  49. assert((idx >= 0) && (idx < (int) PLAT_MAX_PWR_LVL_STATES));
  50. return idx;
  51. }
  52. /*******************************************************************************
  53. * This function is passed the target local power states for each power
  54. * domain (state_info) between the current CPU domain and its ancestors until
  55. * the target power level (end_pwrlvl).
  56. *
  57. * Then, for each level (apart from the CPU level) until the 'end_pwrlvl', it
  58. * updates the `last_cpu_in_non_cpu_pd[]` with last power down cpu id.
  59. *
  60. * This function will only be invoked with data cache enabled and while
  61. * powering down a core.
  62. ******************************************************************************/
  63. void psci_stats_update_pwr_down(unsigned int end_pwrlvl,
  64. const psci_power_state_t *state_info)
  65. {
  66. unsigned int lvl, parent_idx;
  67. unsigned int cpu_idx = plat_my_core_pos();
  68. assert(end_pwrlvl <= PLAT_MAX_PWR_LVL);
  69. assert(state_info != NULL);
  70. parent_idx = psci_cpu_pd_nodes[cpu_idx].parent_node;
  71. for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {
  72. /* Break early if the target power state is RUN */
  73. if (is_local_state_run(state_info->pwr_domain_state[lvl]) != 0)
  74. break;
  75. /*
  76. * The power domain is entering a low power state, so this is
  77. * the last CPU for this power domain
  78. */
  79. last_cpu_in_non_cpu_pd[parent_idx] = (int)cpu_idx;
  80. parent_idx = psci_non_cpu_pd_nodes[parent_idx].parent_node;
  81. }
  82. }
  83. /*******************************************************************************
  84. * This function updates the PSCI STATS(residency time and count) for CPU
  85. * and NON-CPU power domains.
  86. * It is called with caches enabled and locks acquired(for NON-CPU domain)
  87. ******************************************************************************/
  88. void psci_stats_update_pwr_up(unsigned int end_pwrlvl,
  89. const psci_power_state_t *state_info)
  90. {
  91. unsigned int lvl, parent_idx;
  92. unsigned int cpu_idx = plat_my_core_pos();
  93. int stat_idx;
  94. plat_local_state_t local_state;
  95. u_register_t residency;
  96. assert(end_pwrlvl <= PLAT_MAX_PWR_LVL);
  97. assert(state_info != NULL);
  98. /* Get the index into the stats array */
  99. local_state = state_info->pwr_domain_state[PSCI_CPU_PWR_LVL];
  100. stat_idx = get_stat_idx(local_state, PSCI_CPU_PWR_LVL);
  101. /* Call into platform interface to calculate residency. */
  102. residency = plat_psci_stat_get_residency(PSCI_CPU_PWR_LVL,
  103. state_info, cpu_idx);
  104. /* Update CPU stats. */
  105. psci_cpu_stat[cpu_idx][stat_idx].residency += residency;
  106. psci_cpu_stat[cpu_idx][stat_idx].count++;
  107. /*
  108. * Check what power domains above CPU were off
  109. * prior to this CPU powering on.
  110. */
  111. parent_idx = psci_cpu_pd_nodes[cpu_idx].parent_node;
  112. /* Return early if this is the first power up. */
  113. if (last_cpu_in_non_cpu_pd[parent_idx] == -1)
  114. return;
  115. for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {
  116. local_state = state_info->pwr_domain_state[lvl];
  117. if (is_local_state_run(local_state) != 0) {
  118. /* Break early */
  119. break;
  120. }
  121. assert(last_cpu_in_non_cpu_pd[parent_idx] != -1);
  122. /* Call into platform interface to calculate residency. */
  123. residency = plat_psci_stat_get_residency(lvl, state_info,
  124. (unsigned int)last_cpu_in_non_cpu_pd[parent_idx]);
  125. /* Initialize back to reset value */
  126. last_cpu_in_non_cpu_pd[parent_idx] = -1;
  127. /* Get the index into the stats array */
  128. stat_idx = get_stat_idx(local_state, lvl);
  129. /* Update non cpu stats */
  130. psci_non_cpu_stat[parent_idx][stat_idx].residency += residency;
  131. psci_non_cpu_stat[parent_idx][stat_idx].count++;
  132. parent_idx = psci_non_cpu_pd_nodes[parent_idx].parent_node;
  133. }
  134. }
  135. /*******************************************************************************
  136. * This function returns the appropriate count and residency time of the
  137. * local state for the highest power level expressed in the `power_state`
  138. * for the node represented by `target_cpu`.
  139. ******************************************************************************/
  140. static int psci_get_stat(u_register_t target_cpu, unsigned int power_state,
  141. psci_stat_t *psci_stat)
  142. {
  143. int rc;
  144. unsigned int pwrlvl, lvl, parent_idx, target_idx;
  145. int stat_idx;
  146. psci_power_state_t state_info = { {PSCI_LOCAL_STATE_RUN} };
  147. plat_local_state_t local_state;
  148. /* Validate the target_cpu parameter and determine the cpu index */
  149. target_idx = (unsigned int) plat_core_pos_by_mpidr(target_cpu);
  150. if (target_idx == (unsigned int) -1)
  151. return PSCI_E_INVALID_PARAMS;
  152. /* Validate the power_state parameter */
  153. if (psci_plat_pm_ops->translate_power_state_by_mpidr == NULL)
  154. rc = psci_validate_power_state(power_state, &state_info);
  155. else
  156. rc = psci_plat_pm_ops->translate_power_state_by_mpidr(
  157. target_cpu, power_state, &state_info);
  158. if (rc != PSCI_E_SUCCESS)
  159. return PSCI_E_INVALID_PARAMS;
  160. /* Find the highest power level */
  161. pwrlvl = psci_find_target_suspend_lvl(&state_info);
  162. if (pwrlvl == PSCI_INVALID_PWR_LVL) {
  163. ERROR("Invalid target power level for PSCI statistics operation\n");
  164. panic();
  165. }
  166. /* Get the index into the stats array */
  167. local_state = state_info.pwr_domain_state[pwrlvl];
  168. stat_idx = get_stat_idx(local_state, pwrlvl);
  169. if (pwrlvl > PSCI_CPU_PWR_LVL) {
  170. /* Get the power domain index */
  171. parent_idx = SPECULATION_SAFE_VALUE(psci_cpu_pd_nodes[target_idx].parent_node);
  172. for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl < pwrlvl; lvl++)
  173. parent_idx = SPECULATION_SAFE_VALUE(psci_non_cpu_pd_nodes[parent_idx].parent_node);
  174. /* Get the non cpu power domain stats */
  175. *psci_stat = psci_non_cpu_stat[parent_idx][stat_idx];
  176. } else {
  177. /* Get the cpu power domain stats */
  178. *psci_stat = psci_cpu_stat[target_idx][stat_idx];
  179. }
  180. return PSCI_E_SUCCESS;
  181. }
  182. /* This is the top level function for PSCI_STAT_RESIDENCY SMC. */
  183. u_register_t psci_stat_residency(u_register_t target_cpu,
  184. unsigned int power_state)
  185. {
  186. psci_stat_t psci_stat;
  187. int rc = psci_get_stat(target_cpu, power_state, &psci_stat);
  188. if (rc == PSCI_E_SUCCESS)
  189. return psci_stat.residency;
  190. else
  191. return 0;
  192. }
  193. /* This is the top level function for PSCI_STAT_COUNT SMC. */
  194. u_register_t psci_stat_count(u_register_t target_cpu,
  195. unsigned int power_state)
  196. {
  197. psci_stat_t psci_stat;
  198. int rc = psci_get_stat(target_cpu, power_state, &psci_stat);
  199. if (rc == PSCI_E_SUCCESS)
  200. return psci_stat.count;
  201. else
  202. return 0;
  203. }