feat_detect.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428
  1. /*
  2. * Copyright (c) 2022-2024, Arm Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <arch_features.h>
  7. #include <common/debug.h>
  8. #include <common/feat_detect.h>
  9. static bool tainted;
  10. /*******************************************************************************
  11. * This section lists the wrapper modules for each feature to evaluate the
  12. * feature states (FEAT_STATE_ALWAYS and FEAT_STATE_CHECK) and perform
  13. * necessary action as below:
  14. *
  15. * It verifies whether the FEAT_XXX (eg: FEAT_SB) is supported by the PE or not.
  16. * Without this check an exception would occur during context save/restore
  17. * routines, if the feature is enabled but not supported by PE.
  18. ******************************************************************************/
  19. #define feat_detect_panic(a, b) ((a) ? (void)0 : feature_panic(b))
  20. /*******************************************************************************
  21. * Function : feature_panic
  22. * Customised panic function with error logging mechanism to list the feature
  23. * not supported by the PE.
  24. ******************************************************************************/
  25. static inline void feature_panic(char *feat_name)
  26. {
  27. ERROR("FEAT_%s not supported by the PE\n", feat_name);
  28. panic();
  29. }
  30. /*******************************************************************************
  31. * Function : check_feature
  32. * Check for a valid combination of build time flags (ENABLE_FEAT_xxx) and
  33. * feature availability on the hardware. <min> is the smallest feature
  34. * ID field value that is required for that feature.
  35. * Triggers a panic later if a feature is forcefully enabled, but not
  36. * available on the PE. Also will panic if the hardware feature ID field
  37. * is larger than the maximum known and supported number, specified by <max>.
  38. *
  39. * We force inlining here to let the compiler optimise away the whole check
  40. * if the feature is disabled at build time (FEAT_STATE_DISABLED).
  41. ******************************************************************************/
  42. static inline void __attribute((__always_inline__))
  43. check_feature(int state, unsigned long field, const char *feat_name,
  44. unsigned int min, unsigned int max)
  45. {
  46. if (state == FEAT_STATE_ALWAYS && field < min) {
  47. ERROR("FEAT_%s not supported by the PE\n", feat_name);
  48. tainted = true;
  49. }
  50. if (state >= FEAT_STATE_ALWAYS && field > max) {
  51. ERROR("FEAT_%s is version %ld, but is only known up to version %d\n",
  52. feat_name, field, max);
  53. tainted = true;
  54. }
  55. }
  56. /************************************************
  57. * Feature : FEAT_PAUTH (Pointer Authentication)
  58. ***********************************************/
  59. static void read_feat_pauth(void)
  60. {
  61. #if (ENABLE_PAUTH == FEAT_STATE_ALWAYS) || (CTX_INCLUDE_PAUTH_REGS == FEAT_STATE_ALWAYS)
  62. feat_detect_panic(is_armv8_3_pauth_present(), "PAUTH");
  63. #endif
  64. }
  65. static unsigned int read_feat_rng_trap_id_field(void)
  66. {
  67. return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT,
  68. ID_AA64PFR1_EL1_RNDR_TRAP_MASK);
  69. }
  70. static unsigned int read_feat_bti_id_field(void)
  71. {
  72. return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_BT_SHIFT,
  73. ID_AA64PFR1_EL1_BT_MASK);
  74. }
  75. static unsigned int read_feat_sb_id_field(void)
  76. {
  77. return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_SB_SHIFT,
  78. ID_AA64ISAR1_SB_MASK);
  79. }
  80. static unsigned int read_feat_csv2_id_field(void)
  81. {
  82. return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_CSV2_SHIFT,
  83. ID_AA64PFR0_CSV2_MASK);
  84. }
  85. static unsigned int read_feat_debugv8p9_id_field(void)
  86. {
  87. return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_DEBUGVER_SHIFT,
  88. ID_AA64DFR0_DEBUGVER_MASK);
  89. }
  90. static unsigned int read_feat_pmuv3_id_field(void)
  91. {
  92. return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMUVER_SHIFT,
  93. ID_AA64DFR0_PMUVER_MASK);
  94. }
  95. static unsigned int read_feat_vhe_id_field(void)
  96. {
  97. return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_VHE_SHIFT,
  98. ID_AA64MMFR1_EL1_VHE_MASK);
  99. }
  100. static unsigned int read_feat_sve_id_field(void)
  101. {
  102. return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SVE_SHIFT,
  103. ID_AA64PFR0_SVE_MASK);
  104. }
  105. static unsigned int read_feat_ras_id_field(void)
  106. {
  107. return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_RAS_SHIFT,
  108. ID_AA64PFR0_RAS_MASK);
  109. }
  110. static unsigned int read_feat_dit_id_field(void)
  111. {
  112. return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_DIT_SHIFT,
  113. ID_AA64PFR0_DIT_MASK);
  114. }
  115. static unsigned int read_feat_amu_id_field(void)
  116. {
  117. return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU_SHIFT,
  118. ID_AA64PFR0_AMU_MASK);
  119. }
  120. static unsigned int read_feat_mpam_version(void)
  121. {
  122. return (unsigned int)((((read_id_aa64pfr0_el1() >>
  123. ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) |
  124. ((read_id_aa64pfr1_el1() >>
  125. ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK));
  126. }
  127. static unsigned int read_feat_nv_id_field(void)
  128. {
  129. return ISOLATE_FIELD(read_id_aa64mmfr2_el1(), ID_AA64MMFR2_EL1_NV_SHIFT,
  130. ID_AA64MMFR2_EL1_NV_MASK);
  131. }
  132. static unsigned int read_feat_sel2_id_field(void)
  133. {
  134. return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SEL2_SHIFT,
  135. ID_AA64PFR0_SEL2_MASK);
  136. }
  137. static unsigned int read_feat_trf_id_field(void)
  138. {
  139. return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT_SHIFT,
  140. ID_AA64DFR0_TRACEFILT_MASK);
  141. }
  142. static unsigned int get_armv8_5_mte_support(void)
  143. {
  144. return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_MTE_SHIFT,
  145. ID_AA64PFR1_EL1_MTE_MASK);
  146. }
  147. static unsigned int read_feat_rng_id_field(void)
  148. {
  149. return ISOLATE_FIELD(read_id_aa64isar0_el1(), ID_AA64ISAR0_RNDR_SHIFT,
  150. ID_AA64ISAR0_RNDR_MASK);
  151. }
  152. static unsigned int read_feat_fgt_id_field(void)
  153. {
  154. return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT_SHIFT,
  155. ID_AA64MMFR0_EL1_FGT_MASK);
  156. }
  157. static unsigned int read_feat_ecv_id_field(void)
  158. {
  159. return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_ECV_SHIFT,
  160. ID_AA64MMFR0_EL1_ECV_MASK);
  161. }
  162. static unsigned int read_feat_twed_id_field(void)
  163. {
  164. return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_TWED_SHIFT,
  165. ID_AA64MMFR1_EL1_TWED_MASK);
  166. }
  167. static unsigned int read_feat_hcx_id_field(void)
  168. {
  169. return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX_SHIFT,
  170. ID_AA64MMFR1_EL1_HCX_MASK);
  171. }
  172. static unsigned int read_feat_ls64_id_field(void)
  173. {
  174. return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_LS64_SHIFT,
  175. ID_AA64ISAR1_LS64_MASK);
  176. }
  177. static unsigned int read_feat_tcr2_id_field(void)
  178. {
  179. return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_TCRX_SHIFT,
  180. ID_AA64MMFR3_EL1_TCRX_MASK);
  181. }
  182. static unsigned int read_feat_s2pie_id_field(void)
  183. {
  184. return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S2PIE_SHIFT,
  185. ID_AA64MMFR3_EL1_S2PIE_MASK);
  186. }
  187. static unsigned int read_feat_s1pie_id_field(void)
  188. {
  189. return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S1PIE_SHIFT,
  190. ID_AA64MMFR3_EL1_S1PIE_MASK);
  191. }
  192. static unsigned int read_feat_s2poe_id_field(void)
  193. {
  194. return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S2POE_SHIFT,
  195. ID_AA64MMFR3_EL1_S2POE_MASK);
  196. }
  197. static unsigned int read_feat_s1poe_id_field(void)
  198. {
  199. return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S1POE_SHIFT,
  200. ID_AA64MMFR3_EL1_S1POE_MASK);
  201. }
  202. static unsigned int read_feat_brbe_id_field(void)
  203. {
  204. return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE_SHIFT,
  205. ID_AA64DFR0_BRBE_MASK);
  206. }
  207. static unsigned int read_feat_trbe_id_field(void)
  208. {
  209. return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER_SHIFT,
  210. ID_AA64DFR0_TRACEBUFFER_MASK);
  211. }
  212. static unsigned int read_feat_sme_id_field(void)
  213. {
  214. return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_SME_SHIFT,
  215. ID_AA64PFR1_EL1_SME_MASK);
  216. }
  217. static unsigned int read_feat_gcs_id_field(void)
  218. {
  219. return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_GCS_SHIFT,
  220. ID_AA64PFR1_EL1_GCS_MASK);
  221. }
  222. static unsigned int read_feat_rme_id_field(void)
  223. {
  224. return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_FEAT_RME_SHIFT,
  225. ID_AA64PFR0_FEAT_RME_MASK);
  226. }
  227. static unsigned int read_feat_pan_id_field(void)
  228. {
  229. return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_PAN_SHIFT,
  230. ID_AA64MMFR1_EL1_PAN_MASK);
  231. }
  232. static unsigned int read_feat_mtpmu_id_field(void)
  233. {
  234. return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_MTPMU_SHIFT,
  235. ID_AA64DFR0_MTPMU_MASK);
  236. }
  237. static unsigned int read_feat_the_id_field(void)
  238. {
  239. return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_THE_SHIFT,
  240. ID_AA64PFR1_EL1_THE_MASK);
  241. }
  242. static unsigned int read_feat_sctlr2_id_field(void)
  243. {
  244. return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_SCTLR2_SHIFT,
  245. ID_AA64MMFR3_EL1_SCTLR2_MASK);
  246. }
  247. static unsigned int read_feat_d128_id_field(void)
  248. {
  249. return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_D128_SHIFT,
  250. ID_AA64MMFR3_EL1_D128_MASK);
  251. }
  252. static unsigned int read_feat_fpmr_id_field(void)
  253. {
  254. return ISOLATE_FIELD(read_id_aa64pfr2_el1(), ID_AA64PFR2_EL1_FPMR_SHIFT,
  255. ID_AA64PFR2_EL1_FPMR_MASK);
  256. }
  257. /***********************************************************************************
  258. * TF-A supports many Arm architectural features starting from arch version
  259. * (8.0 till 8.7+). These features are mostly enabled through build flags. This
  260. * mechanism helps in validating these build flags in the early boot phase
  261. * either in BL1 or BL31 depending on the platform and assists in identifying
  262. * and notifying the features which are enabled but not supported by the PE.
  263. *
  264. * It reads all the enabled features ID-registers and ensures the features
  265. * are supported by the PE.
  266. * In case if they aren't it stops booting at an early phase and logs the error
  267. * messages, notifying the platforms about the features that are not supported.
  268. *
  269. * Further the procedure is implemented with a tri-state approach for each feature:
  270. * ENABLE_FEAT_xxx = 0 : The feature is disabled statically at compile time
  271. * ENABLE_FEAT_xxx = 1 : The feature is enabled and must be present in hardware.
  272. * There will be panic if feature is not present at cold boot.
  273. * ENABLE_FEAT_xxx = 2 : The feature is enabled but dynamically enabled at runtime
  274. * depending on hardware capability.
  275. *
  276. * For better readability, state values are defined with macros, namely:
  277. * { FEAT_STATE_DISABLED, FEAT_STATE_ALWAYS, FEAT_STATE_CHECK }, taking values
  278. * { 0, 1, 2 }, respectively, as their naming.
  279. **********************************************************************************/
  280. void detect_arch_features(void)
  281. {
  282. tainted = false;
  283. /* v8.0 features */
  284. check_feature(ENABLE_FEAT_SB, read_feat_sb_id_field(), "SB", 1, 1);
  285. check_feature(ENABLE_FEAT_CSV2_2, read_feat_csv2_id_field(),
  286. "CSV2_2", 2, 3);
  287. /*
  288. * Even though the PMUv3 is an OPTIONAL feature, it is always
  289. * implemented and Arm prescribes so. So assume it will be there and do
  290. * away with a flag for it. This is used to check minor PMUv3px
  291. * revisions so that we catch them as they come along
  292. */
  293. check_feature(FEAT_STATE_ALWAYS, read_feat_pmuv3_id_field(),
  294. "PMUv3", 1, ID_AA64DFR0_PMUVER_PMUV3P8);
  295. /* v8.1 features */
  296. check_feature(ENABLE_FEAT_PAN, read_feat_pan_id_field(), "PAN", 1, 3);
  297. check_feature(ENABLE_FEAT_VHE, read_feat_vhe_id_field(), "VHE", 1, 1);
  298. /* v8.2 features */
  299. check_feature(ENABLE_SVE_FOR_NS, read_feat_sve_id_field(),
  300. "SVE", 1, 1);
  301. check_feature(ENABLE_FEAT_RAS, read_feat_ras_id_field(), "RAS", 1, 2);
  302. /* v8.3 features */
  303. /* TODO: Pauth yet to convert to tri-state feat detect logic */
  304. read_feat_pauth();
  305. /* v8.4 features */
  306. check_feature(ENABLE_FEAT_DIT, read_feat_dit_id_field(), "DIT", 1, 1);
  307. check_feature(ENABLE_FEAT_AMU, read_feat_amu_id_field(),
  308. "AMUv1", 1, 2);
  309. check_feature(ENABLE_FEAT_MPAM, read_feat_mpam_version(),
  310. "MPAM", 1, 17);
  311. check_feature(CTX_INCLUDE_NEVE_REGS, read_feat_nv_id_field(),
  312. "NV2", 2, 2);
  313. check_feature(ENABLE_FEAT_SEL2, read_feat_sel2_id_field(),
  314. "SEL2", 1, 1);
  315. check_feature(ENABLE_TRF_FOR_NS, read_feat_trf_id_field(),
  316. "TRF", 1, 1);
  317. /* v8.5 features */
  318. check_feature(ENABLE_FEAT_MTE2, get_armv8_5_mte_support(), "MTE2",
  319. MTE_IMPLEMENTED_ELX, MTE_IMPLEMENTED_ASY);
  320. check_feature(ENABLE_FEAT_RNG, read_feat_rng_id_field(), "RNG", 1, 1);
  321. check_feature(ENABLE_BTI, read_feat_bti_id_field(), "BTI", 1, 1);
  322. check_feature(ENABLE_FEAT_RNG_TRAP, read_feat_rng_trap_id_field(),
  323. "RNG_TRAP", 1, 1);
  324. /* v8.6 features */
  325. check_feature(ENABLE_FEAT_AMUv1p1, read_feat_amu_id_field(),
  326. "AMUv1p1", 2, 2);
  327. check_feature(ENABLE_FEAT_FGT, read_feat_fgt_id_field(), "FGT", 1, 2);
  328. check_feature(ENABLE_FEAT_FGT2, read_feat_fgt_id_field(), "FGT2", 2, 2);
  329. check_feature(ENABLE_FEAT_ECV, read_feat_ecv_id_field(), "ECV", 1, 2);
  330. check_feature(ENABLE_FEAT_TWED, read_feat_twed_id_field(),
  331. "TWED", 1, 1);
  332. /*
  333. * even though this is a "DISABLE" it does confusingly perform feature
  334. * enablement duties like all other flags here. Check it against the HW
  335. * feature when we intend to diverge from the default behaviour
  336. */
  337. check_feature(DISABLE_MTPMU, read_feat_mtpmu_id_field(), "MTPMU", 1, 1);
  338. /* v8.7 features */
  339. check_feature(ENABLE_FEAT_HCX, read_feat_hcx_id_field(), "HCX", 1, 1);
  340. check_feature(ENABLE_FEAT_LS64_ACCDATA, read_feat_ls64_id_field(), "LS64", 1, 3);
  341. /* v8.9 features */
  342. check_feature(ENABLE_FEAT_TCR2, read_feat_tcr2_id_field(),
  343. "TCR2", 1, 1);
  344. check_feature(ENABLE_FEAT_S2PIE, read_feat_s2pie_id_field(),
  345. "S2PIE", 1, 1);
  346. check_feature(ENABLE_FEAT_S1PIE, read_feat_s1pie_id_field(),
  347. "S1PIE", 1, 1);
  348. check_feature(ENABLE_FEAT_S2POE, read_feat_s2poe_id_field(),
  349. "S2POE", 1, 1);
  350. check_feature(ENABLE_FEAT_S1POE, read_feat_s1poe_id_field(),
  351. "S1POE", 1, 1);
  352. check_feature(ENABLE_FEAT_CSV2_3, read_feat_csv2_id_field(),
  353. "CSV2_3", 3, 3);
  354. check_feature(ENABLE_FEAT_DEBUGV8P9, read_feat_debugv8p9_id_field(),
  355. "DEBUGV8P9", 11, 11);
  356. check_feature(ENABLE_FEAT_THE, read_feat_the_id_field(),
  357. "THE", 1, 1);
  358. check_feature(ENABLE_FEAT_SCTLR2, read_feat_sctlr2_id_field(),
  359. "SCTLR2", 1, 1);
  360. /* v9.0 features */
  361. check_feature(ENABLE_BRBE_FOR_NS, read_feat_brbe_id_field(),
  362. "BRBE", 1, 2);
  363. check_feature(ENABLE_TRBE_FOR_NS, read_feat_trbe_id_field(),
  364. "TRBE", 1, 1);
  365. /* v9.2 features */
  366. check_feature(ENABLE_SME_FOR_NS, read_feat_sme_id_field(),
  367. "SME", 1, 2);
  368. check_feature(ENABLE_SME2_FOR_NS, read_feat_sme_id_field(),
  369. "SME2", 2, 2);
  370. check_feature(ENABLE_FEAT_FPMR, read_feat_fpmr_id_field(),
  371. "FPMR", 1, 1);
  372. /* v9.3 features */
  373. check_feature(ENABLE_FEAT_D128, read_feat_d128_id_field(),
  374. "D128", 1, 1);
  375. /* v9.4 features */
  376. check_feature(ENABLE_FEAT_GCS, read_feat_gcs_id_field(), "GCS", 1, 1);
  377. check_feature(ENABLE_RME, read_feat_rme_id_field(), "RME", 1, 1);
  378. if (tainted) {
  379. panic();
  380. }
  381. }