mss_bl31_setup.c 797 B

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  1. /*
  2. * Copyright (C) 2021 Marvell International Ltd.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. * https://spdx.org/licenses
  6. */
  7. #include <platform_def.h>
  8. #include <common/bl_common.h>
  9. #include <common/debug.h>
  10. #include <lib/mmio.h>
  11. #include <armada_common.h>
  12. #include "mss_defs.h"
  13. void mss_start_cp_cm3(int cp)
  14. {
  15. uint32_t magic;
  16. uintptr_t sram = MVEBU_CP_REGS_BASE(cp) + MSS_CP_SRAM_OFFSET;
  17. uintptr_t regs = MVEBU_CP_REGS_BASE(cp) + MSS_CP_REGS_OFFSET;
  18. magic = mmio_read_32(sram);
  19. /* Make sure the FW was loaded */
  20. if (magic != MSS_FW_READY_MAGIC) {
  21. return;
  22. }
  23. NOTICE("Starting CP%d MSS CPU\n", cp);
  24. /* remove the magic */
  25. mmio_write_32(sram, 0);
  26. /* Release M3 from reset */
  27. mmio_write_32(MSS_M3_RSTCR(regs),
  28. (MSS_M3_RSTCR_RST_OFF << MSS_M3_RSTCR_RST_OFFSET));
  29. }