mtk_ptp3_main.c 2.0 KB

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  1. /*
  2. * Copyright (c) 2020, MediaTek Inc. All rights reserved. \
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include "mtk_ptp3_common.h"
  7. /************************************************
  8. * Central control: turn on sysPi protection
  9. ************************************************/
  10. static unsigned int ptp3_cfg1[NR_PTP3_CFG1_CPU][NR_PTP3_CFG] = {
  11. {0x0C530610, 0x110842},
  12. {0x0C530E10, 0x110842},
  13. {0x0C531610, 0x110842},
  14. {0x0C531E10, 0x110842},
  15. {0x0C532610, 0x110842},
  16. {0x0C532E10, 0x110842},
  17. {0x0C533610, 0x110842},
  18. {0x0C533E10, 0x110842}
  19. };
  20. static unsigned int ptp3_cfg2[NR_PTP3_CFG2_CPU][NR_PTP3_CFG] = {
  21. {0x0C53B830, 0x68000},
  22. {0x0C53BA30, 0x68000},
  23. {0x0C53BC30, 0x68000},
  24. {0x0C53BE30, 0x68000}
  25. };
  26. static unsigned int ptp3_cfg3[NR_PTP3_CFG3_CPU][NR_PTP3_CFG] = {
  27. {0x0C532480, 0x7C607C6},
  28. {0x0C532C80, 0x7C607C6},
  29. {0x0C533480, 0x7C607C6},
  30. {0x0C533C80, 0x7C607C6}
  31. };
  32. /************************************************
  33. * API
  34. ************************************************/
  35. void ptp3_init(unsigned int core)
  36. {
  37. unsigned int _core;
  38. /* Apply ptp3_cfg1 for core 0 to 7 */
  39. if (core < NR_PTP3_CFG1_CPU) {
  40. /* update ptp3_cfg1 */
  41. ptp3_write(
  42. ptp3_cfg1[core][PTP3_CFG_ADDR],
  43. ptp3_cfg1[core][PTP3_CFG_VALUE]);
  44. }
  45. /* Apply ptp3_cfg2 for core 4 to 7 */
  46. if (core >= PTP3_CFG2_CPU_START_ID) {
  47. _core = core - PTP3_CFG2_CPU_START_ID;
  48. if (_core < NR_PTP3_CFG2_CPU) {
  49. /* update ptp3_cfg2 */
  50. ptp3_write(
  51. ptp3_cfg2[_core][PTP3_CFG_ADDR],
  52. ptp3_cfg2[_core][PTP3_CFG_VALUE]);
  53. }
  54. }
  55. /* Apply ptp3_cfg3 for core 4 to 7 */
  56. if (core >= PTP3_CFG3_CPU_START_ID) {
  57. _core = core - PTP3_CFG3_CPU_START_ID;
  58. if (_core < NR_PTP3_CFG3_CPU) {
  59. /* update ptp3_cfg3 */
  60. ptp3_write(
  61. ptp3_cfg3[_core][PTP3_CFG_ADDR],
  62. ptp3_cfg3[_core][PTP3_CFG_VALUE]);
  63. }
  64. }
  65. }
  66. void ptp3_deinit(unsigned int core)
  67. {
  68. if (core < NR_PTP3_CFG1_CPU) {
  69. /* update ptp3_cfg1 */
  70. ptp3_write(
  71. ptp3_cfg1[core][PTP3_CFG_ADDR],
  72. ptp3_cfg1[core][PTP3_CFG_VALUE] &
  73. ~PTP3_CFG1_MASK);
  74. }
  75. }