rockchip_gicv2.c 2.7 KB

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  1. /*
  2. * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <platform_def.h>
  7. #include <common/bl_common.h>
  8. #include <common/interrupt_props.h>
  9. #include <drivers/arm/gicv2.h>
  10. #include <lib/utils.h>
  11. /******************************************************************************
  12. * The following functions are defined as weak to allow a platform to override
  13. * the way the GICv2 driver is initialised and used.
  14. *****************************************************************************/
  15. #pragma weak plat_rockchip_gic_driver_init
  16. #pragma weak plat_rockchip_gic_init
  17. #pragma weak plat_rockchip_gic_cpuif_enable
  18. #pragma weak plat_rockchip_gic_cpuif_disable
  19. #pragma weak plat_rockchip_gic_pcpu_init
  20. /******************************************************************************
  21. * List of interrupts.
  22. *****************************************************************************/
  23. static const interrupt_prop_t g0_interrupt_props[] = {
  24. PLAT_RK_GICV2_G0_IRQS
  25. };
  26. /*
  27. * Ideally `rockchip_gic_data` structure definition should be a `const` but it
  28. * is kept as modifiable for overwriting with different GICD and GICC base when
  29. * running on FVP with VE memory map.
  30. */
  31. gicv2_driver_data_t rockchip_gic_data = {
  32. .gicd_base = PLAT_RK_GICD_BASE,
  33. .gicc_base = PLAT_RK_GICC_BASE,
  34. .interrupt_props = g0_interrupt_props,
  35. .interrupt_props_num = ARRAY_SIZE(g0_interrupt_props),
  36. };
  37. /******************************************************************************
  38. * RockChip common helper to initialize the GICv2 only driver.
  39. *****************************************************************************/
  40. void plat_rockchip_gic_driver_init(void)
  41. {
  42. gicv2_driver_init(&rockchip_gic_data);
  43. }
  44. void plat_rockchip_gic_init(void)
  45. {
  46. gicv2_distif_init();
  47. gicv2_pcpu_distif_init();
  48. gicv2_cpuif_enable();
  49. }
  50. /******************************************************************************
  51. * RockChip common helper to enable the GICv2 CPU interface
  52. *****************************************************************************/
  53. void plat_rockchip_gic_cpuif_enable(void)
  54. {
  55. gicv2_cpuif_enable();
  56. }
  57. /******************************************************************************
  58. * RockChip common helper to disable the GICv2 CPU interface
  59. *****************************************************************************/
  60. void plat_rockchip_gic_cpuif_disable(void)
  61. {
  62. gicv2_cpuif_disable();
  63. }
  64. /******************************************************************************
  65. * RockChip common helper to initialize the per cpu distributor interface
  66. * in GICv2
  67. *****************************************************************************/
  68. void plat_rockchip_gic_pcpu_init(void)
  69. {
  70. gicv2_pcpu_distif_init();
  71. }