ccn_private.h 8.0 KB

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  1. /*
  2. * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef CCN_PRIVATE_H
  7. #define CCN_PRIVATE_H
  8. /*
  9. * A CCN implementation can have a maximum of 64 Request nodes with node IDs
  10. * from 0-63. These IDs are split across the three types of Request nodes
  11. * i.e. RN-F, RN-D and RN-I.
  12. */
  13. #define MAX_RN_NODES 64
  14. /* Enum used to loop through the 3 types of Request nodes */
  15. typedef enum rn_types {
  16. RN_TYPE_RNF = 0,
  17. RN_TYPE_RNI,
  18. RN_TYPE_RND,
  19. NUM_RN_TYPES
  20. } rn_types_t;
  21. /* Macro to convert a region id to its base address */
  22. #define region_id_to_base(id) ((id) << 16)
  23. /*
  24. * Macro to calculate the number of master interfaces resident on a RN-I/RN-D.
  25. * Value of first two bits of the RN-I/D node type + 1 == Maximum number of
  26. * ACE-Lite or ACE-Lite+DVM interfaces supported on this node. E.g.
  27. *
  28. * 0x14 : RN-I with 1 ACE-Lite interface
  29. * 0x15 : RN-I with 2 ACE-Lite interfaces
  30. * 0x16 : RN-I with 3 ACE-Lite interfaces
  31. */
  32. #define rn_type_id_to_master_cnt(id) (((id) & 0x3) + 1)
  33. /*
  34. * Constants used to identify a region in the programmer's view. These are
  35. * common for all regions.
  36. */
  37. #define REGION_ID_LIMIT 256
  38. #define REGION_ID_OFFSET 0xFF00
  39. #define REGION_NODE_ID_SHIFT 8
  40. #define REGION_NODE_ID_MASK 0x7f
  41. #define get_node_id(id_reg) (((id_reg) >> REGION_NODE_ID_SHIFT) \
  42. & REGION_NODE_ID_MASK)
  43. #define REGION_NODE_TYPE_SHIFT 0
  44. #define REGION_NODE_TYPE_MASK 0x1f
  45. #define get_node_type(id_reg) (((id_reg) >> REGION_NODE_TYPE_SHIFT) \
  46. & REGION_NODE_TYPE_MASK)
  47. /* Common offsets of registers to enter or exit a snoop/dvm domain */
  48. #define DOMAIN_CTRL_STAT_OFFSET 0x0200
  49. #define DOMAIN_CTRL_SET_OFFSET 0x0210
  50. #define DOMAIN_CTRL_CLR_OFFSET 0x0220
  51. /*
  52. * Thess macros are used to determine if an operation to add or remove a Request
  53. * node from the snoop/dvm domain has completed. 'rn_id_map' is a bit map of
  54. * nodes. It was used to program the SET or CLEAR control register. The type of
  55. * register is specified by 'op_reg_offset'. 'status_reg' is the bit map of
  56. * nodes currently present in the snoop/dvm domain. 'rn_id_map' and 'status_reg'
  57. * are logically ANDed and the result it stored back in the 'status_reg'. There
  58. * are two outcomes of this operation:
  59. *
  60. * 1. If the DOMAIN_CTRL_SET_OFFSET register was programmed, then the set bits in
  61. * 'rn_id_map' should appear in 'status_reg' when the operation completes. So
  62. * after the AND operation, at some point of time 'status_reg' should equal
  63. * 'rn_id_map'.
  64. *
  65. * 2. If the DOMAIN_CTRL_CLR_OFFSET register was programmed, then the set bits in
  66. * 'rn_id_map' should disappear in 'status_reg' when the operation
  67. * completes. So after the AND operation, at some point of time 'status_reg'
  68. * should equal 0.
  69. */
  70. #define WAIT_FOR_DOMAIN_CTRL_OP_COMPLETION(region_id, stat_reg_offset, \
  71. op_reg_offset, rn_id_map) \
  72. { \
  73. unsigned long long status_reg; \
  74. do { \
  75. status_reg = ccn_reg_read((ccn_plat_desc->periphbase), \
  76. (region_id), \
  77. (stat_reg_offset)); \
  78. status_reg &= (rn_id_map); \
  79. } while ((op_reg_offset) == DOMAIN_CTRL_SET_OFFSET ? \
  80. (rn_id_map) != status_reg : status_reg); \
  81. }
  82. /*
  83. * Region ID of the Miscellaneous Node is always 0 as its located at the base of
  84. * the programmer's view.
  85. */
  86. #define MN_REGION_ID 0
  87. #define MN_REGION_ID_START 0
  88. #define DEBUG_REGION_ID_START 1
  89. #define HNI_REGION_ID_START 8
  90. #define SBSX_REGION_ID_START 16
  91. #define HNF_REGION_ID_START 32
  92. #define XP_REGION_ID_START 64
  93. #define RNI_REGION_ID_START 128
  94. /* Selected register offsets from the base of a HNF region */
  95. #define HNF_CFG_CTRL_OFFSET 0x0000
  96. #define HNF_SAM_CTRL_OFFSET 0x0008
  97. #define HNF_PSTATE_REQ_OFFSET 0x0010
  98. #define HNF_PSTATE_STAT_OFFSET 0x0018
  99. #define HNF_SDC_STAT_OFFSET DOMAIN_CTRL_STAT_OFFSET
  100. #define HNF_SDC_SET_OFFSET DOMAIN_CTRL_SET_OFFSET
  101. #define HNF_SDC_CLR_OFFSET DOMAIN_CTRL_CLR_OFFSET
  102. #define HNF_AUX_CTRL_OFFSET 0x0500
  103. /* Selected register offsets from the base of a MN region */
  104. #define MN_SAR_OFFSET 0x0000
  105. #define MN_RNF_NODEID_OFFSET 0x0180
  106. #define MN_RNI_NODEID_OFFSET 0x0190
  107. #define MN_RND_NODEID_OFFSET 0x01A0
  108. #define MN_HNF_NODEID_OFFSET 0x01B0
  109. #define MN_HNI_NODEID_OFFSET 0x01C0
  110. #define MN_SN_NODEID_OFFSET 0x01D0
  111. #define MN_DDC_STAT_OFFSET DOMAIN_CTRL_STAT_OFFSET
  112. #define MN_DDC_SET_OFFSET DOMAIN_CTRL_SET_OFFSET
  113. #define MN_DDC_CLR_OFFSET DOMAIN_CTRL_CLR_OFFSET
  114. #define MN_PERIPH_ID_0_1_OFFSET 0xFE0
  115. #define MN_ID_OFFSET REGION_ID_OFFSET
  116. /* HNF System Address Map register bit masks and shifts */
  117. #define HNF_SAM_CTRL_SN_ID_MASK 0x7f
  118. #define HNF_SAM_CTRL_SN0_ID_SHIFT 0
  119. #define HNF_SAM_CTRL_SN1_ID_SHIFT 8
  120. #define HNF_SAM_CTRL_SN2_ID_SHIFT 16
  121. #define HNF_SAM_CTRL_TAB0_MASK ULL(0x3f)
  122. #define HNF_SAM_CTRL_TAB0_SHIFT 48
  123. #define HNF_SAM_CTRL_TAB1_MASK ULL(0x3f)
  124. #define HNF_SAM_CTRL_TAB1_SHIFT 56
  125. #define HNF_SAM_CTRL_3SN_ENB_SHIFT 32
  126. #define HNF_SAM_CTRL_3SN_ENB_MASK ULL(0x01)
  127. /*
  128. * Macro to create a value suitable for programming into a HNF SAM Control
  129. * register for enabling 3SN striping.
  130. */
  131. #define MAKE_HNF_SAM_CTRL_VALUE(sn0, sn1, sn2, tab0, tab1, three_sn_en) \
  132. ((((sn0) & HNF_SAM_CTRL_SN_ID_MASK) << HNF_SAM_CTRL_SN0_ID_SHIFT) | \
  133. (((sn1) & HNF_SAM_CTRL_SN_ID_MASK) << HNF_SAM_CTRL_SN1_ID_SHIFT) | \
  134. (((sn2) & HNF_SAM_CTRL_SN_ID_MASK) << HNF_SAM_CTRL_SN2_ID_SHIFT) | \
  135. (((tab0) & HNF_SAM_CTRL_TAB0_MASK) << HNF_SAM_CTRL_TAB0_SHIFT) | \
  136. (((tab1) & HNF_SAM_CTRL_TAB1_MASK) << HNF_SAM_CTRL_TAB1_SHIFT) | \
  137. (((three_sn_en) & HNF_SAM_CTRL_3SN_ENB_MASK) << HNF_SAM_CTRL_3SN_ENB_SHIFT))
  138. /* Mask to read the power state value from an HN-F P-state register */
  139. #define HNF_PSTATE_MASK 0xf
  140. /* Macro to extract the run mode from a p-state value */
  141. #define PSTATE_TO_RUN_MODE(pstate) (((pstate) & HNF_PSTATE_MASK) >> 2)
  142. /*
  143. * Helper macro that iterates through a given bit map. In each iteration,
  144. * it returns the position of the set bit.
  145. * It can be used by other utility macros to iterates through all nodes
  146. * or masters given a bit map of them.
  147. */
  148. #define FOR_EACH_BIT(bit_pos, bit_map) \
  149. for (bit_pos = __builtin_ctzll(bit_map); \
  150. bit_map; \
  151. bit_map &= ~(1ULL << (bit_pos)), \
  152. bit_pos = __builtin_ctzll(bit_map))
  153. /*
  154. * Utility macro that iterates through a bit map of node IDs. In each
  155. * iteration, it returns the ID of the next present node in the bit map. Node
  156. * ID of a present node == Position of set bit == Number of zeroes trailing the
  157. * bit.
  158. */
  159. #define FOR_EACH_PRESENT_NODE_ID(node_id, bit_map) \
  160. FOR_EACH_BIT(node_id, bit_map)
  161. /*
  162. * Helper function to return number of set bits in bitmap
  163. */
  164. static inline unsigned int count_set_bits(unsigned long long bitmap)
  165. {
  166. unsigned int count = 0;
  167. for (; bitmap; bitmap &= bitmap - 1)
  168. ++count;
  169. return count;
  170. }
  171. /*
  172. * Utility macro that iterates through a bit map of node IDs. In each iteration,
  173. * it returns the ID of the next present region corresponding to a node present
  174. * in the bit map. Region ID of a present node is in between passed region id
  175. * and region id + number of set bits in the bitmap i.e. the number of present
  176. * nodes.
  177. */
  178. #define FOR_EACH_PRESENT_REGION_ID(region_id, bit_map) \
  179. for (unsigned long long region_id_limit = count_set_bits(bit_map) \
  180. + region_id; \
  181. region_id < region_id_limit; \
  182. region_id++)
  183. /*
  184. * Same macro as FOR_EACH_PRESENT_NODE, but renamed to indicate it traverses
  185. * through a bit map of master interfaces.
  186. */
  187. #define FOR_EACH_PRESENT_MASTER_INTERFACE(iface_id, bit_map) \
  188. FOR_EACH_BIT(iface_id, bit_map)
  189. /*
  190. * Macro that returns the node id bit map for the Miscellaneous Node
  191. */
  192. #define CCN_GET_MN_NODEID_MAP(periphbase) \
  193. (1 << get_node_id(ccn_reg_read(periphbase, MN_REGION_ID, \
  194. REGION_ID_OFFSET)))
  195. /*
  196. * This macro returns the bitmap of Home nodes on the basis of the
  197. * 'mn_hn_id_reg_offset' parameter from the Miscellaneous node's (MN)
  198. * programmer's view. The MN has a register which carries the bitmap of present
  199. * Home nodes of each type i.e. HN-Fs, HN-Is & HN-Ds.
  200. */
  201. #define CCN_GET_HN_NODEID_MAP(periphbase, mn_hn_id_reg_offset) \
  202. ccn_reg_read(periphbase, MN_REGION_ID, mn_hn_id_reg_offset)
  203. #endif /* CCN_PRIVATE_H */