psci-performance-n1sdp.rst 12 KB

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  1. Runtime Instrumentation Testing - N1SDP
  2. =======================================
  3. For this test we used the N1 System Development Platform (`N1SDP`_), which
  4. contains an SoC consisting of two dual-core Arm N1 clusters.
  5. The following source trees and binaries were used:
  6. - `TF-A v2.12-rc0`_
  7. - `TFTF v2.12-rc0`_
  8. - SCP/MCP `Prebuilt Images`_
  9. Please see the Runtime Instrumentation :ref:`Testing Methodology
  10. <Runtime Instrumentation Methodology>` page for more details.
  11. Procedure
  12. ---------
  13. #. Build TFTF with runtime instrumentation enabled:
  14. .. code:: shell
  15. make CROSS_COMPILE=aarch64-none-elf- PLAT=n1sdp \
  16. TESTS=runtime-instrumentation all
  17. #. Build TF-A with the following build options:
  18. .. code:: shell
  19. make CROSS_COMPILE=aarch64-none-elf- PLAT=n1sdp \
  20. ENABLE_RUNTIME_INSTRUMENTATION=1 fiptool all
  21. #. Fetch the SCP firmware images:
  22. .. code:: shell
  23. curl --fail --connect-timeout 5 --retry 5 \
  24. -sLS -o build/n1sdp/release/scp_rom.bin \
  25. https://downloads.trustedfirmware.org/tf-a/css_scp_2.12.0/n1sdp/release/n1sdp-bl1.bin
  26. curl --fail --connect-timeout 5 \
  27. --retry 5 -sLS -o build/n1sdp/release/scp_ram.bin \
  28. https://downloads.trustedfirmware.org/tf-a/css_scp_2.12.0/n1sdp/release/n1sdp-bl2.bin
  29. #. Fetch the MCP firmware images:
  30. .. code:: shell
  31. curl --fail --connect-timeout 5 --retry 5 \
  32. -sLS -o build/n1sdp/release/mcp_rom.bin \
  33. https://downloads.trustedfirmware.org/tf-a/css_scp_2.12.0/n1sdp/release/n1sdp-mcp-bl1.bin
  34. curl --fail --connect-timeout 5 --retry 5 \
  35. -sLS -o build/n1sdp/release/mcp_ram.bin \
  36. https://downloads.trustedfirmware.org/tf-a/css_scp_2.12.0/n1sdp/release/n1sdp-mcp-bl2.bin
  37. #. Using the fiptool, create a new FIP package and append the SCP ram image onto
  38. it.
  39. .. code:: shell
  40. ./tools/fiptool/fiptool create --blob \
  41. uuid=cfacc2c4-15e8-4668-82be-430a38fad705,file=build/n1sdp/release/bl1.bin \
  42. --scp-fw build/n1sdp/release/scp_ram.bin build/n1sdp/release/scp_fw.bin
  43. #. Append the MCP image to the FIP.
  44. .. code:: shell
  45. ./tools/fiptool/fiptool create \
  46. --blob uuid=54464222-a4cf-4bf8-b1b6-cee7dade539e,file=build/n1sdp/release/mcp_ram.bin \
  47. build/n1sdp/release/mcp_fw.bin
  48. #. Then, add TFTF as the Non-Secure workload in the FIP image:
  49. .. code:: shell
  50. make CROSS_COMPILE=aarch64-none-elf- PLAT=n1sdp \
  51. ENABLE_RUNTIME_INSTRUMENTATION=1 SCP_BL2=/dev/null \
  52. BL33=<path/to/tftf.bin> fip
  53. #. Load the following images onto the development board: ``fip.bin``,
  54. ``scp_rom.bin``, ``scp_ram.bin``, ``mcp_rom.bin``, and ``mcp_ram.bin``.
  55. .. note::
  56. These instructions presume you have a complete firmware stack. The N1SDP
  57. `user guide`_ provides a detailed explanation on how to get setup from
  58. scratch.
  59. Results
  60. -------
  61. ``CPU_SUSPEND`` to deepest power level
  62. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  63. .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in parallel (v2.12)
  64. +---------+------+----------------+--------+----------------+
  65. | Cluster | Core | Powerdown | Wakeup | Cache Flush |
  66. +---------+------+----------------+--------+----------------+
  67. | 0 | 0 | 2.58 | 24.14 | 0.28 (-69.57%) |
  68. +---------+------+----------------+--------+----------------+
  69. | 0 | 0 | 4.24 (-32.27%) | 40.1 | 0.3 |
  70. +---------+------+----------------+--------+----------------+
  71. | 1 | 0 | 3.58 | 35.54 | 0.28 |
  72. +---------+------+----------------+--------+----------------+
  73. | 1 | 0 | 3.28 | 42.36 | 0.3 |
  74. +---------+------+----------------+--------+----------------+
  75. .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in parallel (v2.11)
  76. +---------+------+----------------+--------+----------------+
  77. | Cluster | Core | Powerdown | Wakeup | Cache Flush |
  78. +---------+------+----------------+--------+----------------+
  79. | 0 | 0 | 3.0 (+41.51%) | 23.14 | 1.2 (+185.71%) |
  80. +---------+------+----------------+--------+----------------+
  81. | 0 | 0 | 4.6 | 35.86 | 0.3 |
  82. +---------+------+----------------+--------+----------------+
  83. | 1 | 0 | 3.68 (+33.33%) | 33.36 | 0.3 |
  84. +---------+------+----------------+--------+----------------+
  85. | 1 | 0 | 3.7 (+40.15%) | 38.1 | 0.28 |
  86. +---------+------+----------------+--------+----------------+
  87. .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in serial (v2.12)
  88. +---------+------+-----------+--------+-------------+
  89. | Cluster | Core | Powerdown | Wakeup | Cache Flush |
  90. +---------+------+-----------+--------+-------------+
  91. | 0 | 0 | 1.9 | 23.8 | 0.36 |
  92. +---------+------+-----------+--------+-------------+
  93. | 0 | 0 | 2.26 | 23.86 | 0.34 |
  94. +---------+------+-----------+--------+-------------+
  95. | 1 | 0 | 2.02 | 23.4 | 0.36 |
  96. +---------+------+-----------+--------+-------------+
  97. | 1 | 0 | 2.24 | 23.84 | 0.36 |
  98. +---------+------+-----------+--------+-------------+
  99. .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in serial (v2.11)
  100. +---------+------+-----------+--------+-------------+
  101. | Cluster | Core | Powerdown | Wakeup | Cache Flush |
  102. +---------+------+-----------+--------+-------------+
  103. | 0 | 0 | 1.7 | 22.46 | 0.3 |
  104. +---------+------+-----------+--------+-------------+
  105. | 0 | 0 | 2.28 | 22.5 | 0.3 |
  106. +---------+------+-----------+--------+-------------+
  107. | 1 | 0 | 2.14 | 21.5 | 0.32 |
  108. +---------+------+-----------+--------+-------------+
  109. | 1 | 0 | 2.24 | 22.66 | 0.3 |
  110. +---------+------+-----------+--------+-------------+
  111. ``CPU_SUSPEND`` to power level 0
  112. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  113. .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in parallel (v2.12)
  114. +---------+------+-----------+--------+----------------+
  115. | Cluster | Core | Powerdown | Wakeup | Cache Flush |
  116. +---------+------+-----------+--------+----------------+
  117. | 0 | 0 | 1.46 | 31.7 | 0.32 |
  118. +---------+------+-----------+--------+----------------+
  119. | 0 | 0 | 2.06 | 35.5 | 0.48 (+60.00%) |
  120. +---------+------+-----------+--------+----------------+
  121. | 1 | 0 | 1.96 | 35.7 | 0.32 |
  122. +---------+------+-----------+--------+----------------+
  123. | 1 | 0 | 2.08 | 23.38 | 0.28 |
  124. +---------+------+-----------+--------+----------------+
  125. .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in parallel (v2.11)
  126. +---------+------+----------------+--------+-------------+
  127. | Cluster | Core | Powerdown | Wakeup | Cache Flush |
  128. +---------+------+----------------+--------+-------------+
  129. | 0 | 0 | 0.94 (-37.33%) | 30.36 | 0.3 |
  130. +---------+------+----------------+--------+-------------+
  131. | 0 | 0 | 2.12 | 33.12 | 0.28 |
  132. +---------+------+----------------+--------+-------------+
  133. | 1 | 0 | 2.08 | 32.56 | 0.3 |
  134. +---------+------+----------------+--------+-------------+
  135. | 1 | 0 | 2.14 | 21.92 | 0.28 |
  136. +---------+------+----------------+--------+-------------+
  137. .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in serial (v2.12)
  138. +---------+------+-----------+--------+----------------+
  139. | Cluster | Core | Powerdown | Wakeup | Cache Flush |
  140. +---------+------+-----------+--------+----------------+
  141. | 0 | 0 | 1.66 | 23.22 | 0.36 |
  142. +---------+------+-----------+--------+----------------+
  143. | 0 | 0 | 2.58 | 23.72 | 0.78 (+85.71%) |
  144. +---------+------+-----------+--------+----------------+
  145. | 1 | 0 | 2.02 | 23.84 | 0.38 |
  146. +---------+------+-----------+--------+----------------+
  147. | 1 | 0 | 2.16 | 23.92 | 0.34 |
  148. +---------+------+-----------+--------+----------------+
  149. .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in serial (v2.11)
  150. +---------+------+-----------+--------+-------------+
  151. | Cluster | Core | Powerdown | Wakeup | Cache Flush |
  152. +---------+------+-----------+--------+-------------+
  153. | 0 | 0 | 1.64 | 21.88 | 0.34 |
  154. +---------+------+-----------+--------+-------------+
  155. | 0 | 0 | 2.42 | 21.76 | 0.34 |
  156. +---------+------+-----------+--------+-------------+
  157. | 1 | 0 | 2.02 | 21.14 | 0.32 |
  158. +---------+------+-----------+--------+-------------+
  159. | 1 | 0 | 2.18 | 22.3 | 0.34 |
  160. +---------+------+-----------+--------+-------------+
  161. ``CPU_OFF`` on all non-lead CPUs
  162. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  163. ``CPU_OFF`` on all non-lead CPUs in sequence then, ``CPU_SUSPEND`` on the lead
  164. core to the deepest power level.
  165. .. table:: ``CPU_OFF`` latencies (µs) on all non-lead CPUs (v2.12)
  166. +---------+------+-----------+--------+----------------+
  167. | Cluster | Core | Powerdown | Wakeup | Cache Flush |
  168. +---------+------+-----------+--------+----------------+
  169. | 0 | 0 | 1.84 | 23.82 | 0.36 |
  170. +---------+------+-----------+--------+----------------+
  171. | 0 | 0 | 14.18 | 31.78 | 0.56 (+86.67%) |
  172. +---------+------+-----------+--------+----------------+
  173. | 1 | 0 | 13.64 | 30.54 | 0.36 |
  174. +---------+------+-----------+--------+----------------+
  175. | 1 | 0 | 14.18 | 31.82 | 0.68 |
  176. +---------+------+-----------+--------+----------------+
  177. .. table:: ``CPU_OFF`` latencies (µs) on all non-lead CPUs (v2.11)
  178. +---------+------+-----------+--------+----------------+
  179. | Cluster | Core | Powerdown | Wakeup | Cache Flush |
  180. +---------+------+-----------+--------+----------------+
  181. | 0 | 0 | 1.96 | 22.44 | 0.38 |
  182. +---------+------+-----------+--------+----------------+
  183. | 0 | 0 | 13.76 | 30.34 | 0.26 |
  184. +---------+------+-----------+--------+----------------+
  185. | 1 | 0 | 13.46 | 28.28 | 0.24 |
  186. +---------+------+-----------+--------+----------------+
  187. | 1 | 0 | 13.84 | 30.06 | 0.28 (-60.00%) |
  188. +---------+------+-----------+--------+----------------+
  189. ``CPU_VERSION`` in parallel
  190. ~~~~~~~~~~~~~~~~~~~~~~~~~~~
  191. .. table:: ``CPU_VERSION`` latency (µs) in parallel on all cores (v2.12)
  192. +----------+------+-------------------+
  193. | Cluster | Core | Latency |
  194. +----------+------+-------------------+
  195. | 0 | 0 | 0.14 |
  196. +----------+------+-------------------+
  197. | 0 | 0 | 0.2 (-28.57%) |
  198. +----------+------+-------------------+
  199. | 1 | 0 | 0.2 |
  200. +----------+------+-------------------+
  201. | 1 | 0 | 0.26 |
  202. +----------+------+-------------------+
  203. .. table:: ``CPU_VERSION`` latency (µs) in parallel on all cores (v2.11)
  204. +-------------+--------+--------------+
  205. | Cluster | Core | Latency |
  206. +-------------+--------+--------------+
  207. | 0 | 0 | 0.12 |
  208. +-------------+--------+--------------+
  209. | 0 | 0 | 0.24 |
  210. +-------------+--------+--------------+
  211. | 1 | 0 | 0.2 |
  212. +-------------+--------+--------------+
  213. | 1 | 0 | 0.26 |
  214. +-------------+--------+--------------+
  215. --------------
  216. *Copyright (c) 2023-2024, Arm Limited. All rights reserved.*
  217. .. _TF-A v2.12-rc0: https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v2.12-rc0
  218. .. _TFTF v2.12-rc0: https://review.trustedfirmware.org/plugins/gitiles/TF-A/tf-a-tests/+/refs/tags/v2.12-rc0
  219. .. _user guide: https://gitlab.arm.com/arm-reference-solutions/arm-reference-solutions-docs/-/blob/master/docs/n1sdp/user-guide.rst
  220. .. _Prebuilt Images: https://downloads.trustedfirmware.org/tf-a/css_scp_2.12.0/n1sdp/release/
  221. .. _N1SDP: https://developer.arm.com/documentation/101489/latest