imx_crash_uart.S 3.4 KB

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  1. /*
  2. * Copyright (c) Linaro 2018 Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <arch.h>
  7. #include <asm_macros.S>
  8. #include <assert_macros.S>
  9. #include <imx_uart.h>
  10. #include <platform_def.h>
  11. .globl imx_crash_uart_init
  12. .globl imx_crash_uart_putc
  13. /* -----------------------------------------------
  14. * int imx_crash_uart_init(uintptr_t base_addr,
  15. * unsigned int uart_clk, unsigned int baud_rate)
  16. * Function to initialize the console without a
  17. * C Runtime to print debug information. This
  18. * function will be accessed by console_init and
  19. * crash reporting.
  20. * In: r0 - console base address
  21. * r1 - Uart clock in Hz
  22. * r2 - Baud rate
  23. * Out: return 1 on success else 0 on error
  24. * Clobber list : r1, r2, r3, r4
  25. * -----------------------------------------------
  26. */
  27. func imx_crash_uart_init
  28. /* Free up r1 as a scratch reg */
  29. mov r4, r0
  30. mov r0, r1
  31. /* Reset UART via CR2 */
  32. add r1, r4, #IMX_UART_CR2_OFFSET
  33. movs r3, #0
  34. str r3, [r4, #IMX_UART_CR2_OFFSET]
  35. /* Wait for reset complete */
  36. __wait_cr2_reset:
  37. ldr r3, [r1, #0]
  38. ands r3, #IMX_UART_CR2_SRST
  39. beq __wait_cr2_reset
  40. /* Enable UART */
  41. movs r3, #IMX_UART_CR1_UARTEN
  42. mov r1, r2
  43. str r3, [r4, #IMX_UART_CR1_OFFSET]
  44. /*
  45. * Ignore RTC/CTS - disable reset
  46. * Magic value #16423 =>
  47. * IMX_UART_CR2_IRTS | IMX_UART_CR2_WS | IMX_UART_CR2_TXEN | IMX_UART_CR2_RXEN | IMX_UART_CR2_SRST
  48. */
  49. movw r3, #16423
  50. str r3, [r4, #IMX_UART_CR2_OFFSET]
  51. /*
  52. * No parity, autobaud detect-old, rxdmuxsel=1 (fixed i.mx7)
  53. * Magic value => #132
  54. * IMX_UART_CR3_ADNIMP | IMX_UART_CR3_RXDMUXSEL
  55. */
  56. movs r3, #132
  57. str r3, [r4, #IMX_UART_CR3_OFFSET]
  58. /*
  59. * Set CTS FIFO trigger to 32 bytes bits 15:10
  60. * Magic value => #32768
  61. * FIFO trigger bitmask 100000
  62. * */
  63. mov r3, #32768
  64. str r3, [r4, #IMX_UART_CR4_OFFSET]
  65. /*
  66. * TX/RX-thresh = 2 bytes, DCE (bit6 = 0), refclk @24MHz / 4
  67. * Magic value #2562
  68. * IMX_UART_FCR_TXTL(TX_RX_THRESH) | IMX_UART_FCR_RXTL(TX_RX_THRESH) | IMX_UART_FCR_RFDIV2
  69. */
  70. #ifdef IMX_UART_DTE
  71. movw r3, #2626
  72. #else
  73. movw r3, #2562
  74. #endif
  75. str r3, [r4, #IMX_UART_FCR_OFFSET]
  76. /* This BIR should be set to 0x0F prior to writing the BMR */
  77. movs r3, #15
  78. str r3, [r4, #IMX_UART_BIR_OFFSET]
  79. /* Hard-code to 115200 @ 24 MHz */
  80. movs r0, #104
  81. str r0, [r4, #IMX_UART_BMR_OFFSET]
  82. /* Indicate success */
  83. movs r0, #1
  84. bx lr
  85. endfunc imx_crash_uart_init
  86. /* --------------------------------------------------------
  87. * int imx_crash_uart_putc(int c, uintptr_t base_addr)
  88. * Function to output a character over the console. It
  89. * returns the character printed on success or -1 on error.
  90. * In : r0 - character to be printed
  91. * r1 - console base address
  92. * Out : return -1 on error else return character.
  93. * Clobber list : r2
  94. * --------------------------------------------------------
  95. */
  96. func imx_crash_uart_putc
  97. /* Output specified character to UART shift-register */
  98. str r0, [r1, #IMX_UART_TXD_OFFSET]
  99. /* Wait for transmit IMX_UART_STAT2_OFFSET.IMX_UART_STAT2_TXDC == 1 */
  100. __putc_spin_ready:
  101. ldr r2, [r1, #IMX_UART_STAT2_OFFSET]
  102. ands r2, #IMX_UART_STAT2_TXDC
  103. beq __putc_spin_ready
  104. /* Transmit complete do we need to fixup \n to \n\r */
  105. cmp r0, #10
  106. beq __putc_fixup_lf
  107. /* No fixup necessary - exit here */
  108. movs r0, #0
  109. bx lr
  110. /* Fixup \n to \n\r */
  111. __putc_fixup_lf:
  112. movs r0, #13
  113. b imx_crash_uart_putc
  114. endfunc imx_crash_uart_putc