imx_uart.c 4.1 KB

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  1. /*
  2. * Copyright (c) Linaro 2018 Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <stdint.h>
  7. #include <platform_def.h>
  8. #include <arch.h>
  9. #include <lib/mmio.h>
  10. #include <imx_uart.h>
  11. /* TX/RX FIFO threshold */
  12. #define TX_RX_THRESH 2
  13. struct clk_div_factors {
  14. uint32_t fcr_div;
  15. uint32_t bmr_div;
  16. };
  17. static struct clk_div_factors clk_div[] = {
  18. {
  19. .fcr_div = IMX_UART_FCR_RFDIV1,
  20. .bmr_div = 1,
  21. },
  22. {
  23. .fcr_div = IMX_UART_FCR_RFDIV2,
  24. .bmr_div = 2,
  25. },
  26. {
  27. .fcr_div = IMX_UART_FCR_RFDIV3,
  28. .bmr_div = 3,
  29. },
  30. {
  31. .fcr_div = IMX_UART_FCR_RFDIV4,
  32. .bmr_div = 4,
  33. },
  34. {
  35. .fcr_div = IMX_UART_FCR_RFDIV5,
  36. .bmr_div = 5,
  37. },
  38. {
  39. .fcr_div = IMX_UART_FCR_RFDIV6,
  40. .bmr_div = 6,
  41. },
  42. {
  43. .fcr_div = IMX_UART_FCR_RFDIV7,
  44. .bmr_div = 7,
  45. },
  46. };
  47. static void write_reg(uintptr_t base, uint32_t offset, uint32_t val)
  48. {
  49. mmio_write_32(base + offset, val);
  50. }
  51. static uint32_t read_reg(uintptr_t base, uint32_t offset)
  52. {
  53. return mmio_read_32(base + offset);
  54. }
  55. int console_imx_uart_core_init(uintptr_t base_addr, unsigned int uart_clk,
  56. unsigned int baud_rate)
  57. {
  58. uint32_t val;
  59. uint8_t clk_idx = 1;
  60. /* Reset UART */
  61. write_reg(base_addr, IMX_UART_CR2_OFFSET, 0);
  62. do {
  63. val = read_reg(base_addr, IMX_UART_CR2_OFFSET);
  64. } while (!(val & IMX_UART_CR2_SRST));
  65. /* Enable UART */
  66. write_reg(base_addr, IMX_UART_CR1_OFFSET, IMX_UART_CR1_UARTEN);
  67. /* Ignore RTS, 8N1, enable tx/rx, disable reset */
  68. val = (IMX_UART_CR2_IRTS | IMX_UART_CR2_WS | IMX_UART_CR2_TXEN |
  69. IMX_UART_CR2_RXEN | IMX_UART_CR2_SRST);
  70. write_reg(base_addr, IMX_UART_CR2_OFFSET, val);
  71. /* No parity, autobaud detect-old, rxdmuxsel=1 (fixed i.mx7) */
  72. val = IMX_UART_CR3_ADNIMP | IMX_UART_CR3_RXDMUXSEL;
  73. write_reg(base_addr, IMX_UART_CR3_OFFSET, val);
  74. /* Set CTS FIFO trigger to 32 bytes bits 15:10 */
  75. write_reg(base_addr, IMX_UART_CR4_OFFSET, 0x8000);
  76. /* TX/RX-thresh = 2 bytes, DTE (bit6 = 0), refclk @24MHz / 4 */
  77. val = IMX_UART_FCR_TXTL(TX_RX_THRESH) | IMX_UART_FCR_RXTL(TX_RX_THRESH) |
  78. clk_div[clk_idx].fcr_div;
  79. #ifdef IMX_UART_DTE
  80. /* Set DTE (bit6 = 1) */
  81. val |= IMX_UART_FCR_DCEDTE;
  82. #endif
  83. write_reg(base_addr, IMX_UART_FCR_OFFSET, val);
  84. /*
  85. * The equation for BAUD rate calculation is
  86. * RefClk = Supplied clock / FCR_DIVx
  87. *
  88. * BAUD = Refclk
  89. * ------------
  90. * 16 x (UBMR + 1/ UBIR + 1)
  91. *
  92. * We write 0x0f into UBIR to remove the 16 mult
  93. * BAUD = 6000000
  94. * ------------
  95. * 16 x (UBMR + 1/ 15 + 1)
  96. */
  97. write_reg(base_addr, IMX_UART_BIR_OFFSET, 0x0f);
  98. val = ((uart_clk / clk_div[clk_idx].bmr_div) / baud_rate) - 1;
  99. write_reg(base_addr, IMX_UART_BMR_OFFSET, val);
  100. return 0;
  101. }
  102. /* --------------------------------------------------------
  103. * int console_core_putc(int c, uintptr_t base_addr)
  104. * Function to output a character over the console. It
  105. * returns the character printed on success or -1 on error.
  106. * In : r0 - character to be printed
  107. * r1 - console base address
  108. * Out : return -1 on error else return character.
  109. * Clobber list : r2
  110. * --------------------------------------------------------
  111. */
  112. int console_imx_uart_core_putc(int c, uintptr_t base_addr)
  113. {
  114. uint32_t val;
  115. if (c == '\n')
  116. console_imx_uart_core_putc('\r', base_addr);
  117. /* Write data */
  118. write_reg(base_addr, IMX_UART_TXD_OFFSET, c);
  119. /* Wait for transmit */
  120. do {
  121. val = read_reg(base_addr, IMX_UART_STAT2_OFFSET);
  122. } while (!(val & IMX_UART_STAT2_TXDC));
  123. return 0;
  124. }
  125. /*
  126. * Function to get a character from the console.
  127. * It returns the character grabbed on success
  128. * or -1 on error.
  129. * In : r0 - console base address
  130. * Clobber list : r0, r1
  131. * ---------------------------------------------
  132. */
  133. int console_imx_uart_core_getc(uintptr_t base_addr)
  134. {
  135. uint32_t val;
  136. val = read_reg(base_addr, IMX_UART_TS_OFFSET);
  137. if (val & IMX_UART_TS_RXEMPTY)
  138. return -1;
  139. val = read_reg(base_addr, IMX_UART_RXD_OFFSET);
  140. return (int)(val & 0x000000FF);
  141. }
  142. /*
  143. * Function to force a write of all buffered
  144. * data that hasn't been output.
  145. * In : r0 - console base address
  146. * Out : void
  147. * Clobber list : r0, r1
  148. * ---------------------------------------------
  149. */
  150. void console_imx_uart_core_flush(uintptr_t base_addr)
  151. {
  152. }