fvp_r_bl1_exceptions.S 3.1 KB

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  1. /*
  2. * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <arch.h>
  7. #include <asm_macros.S>
  8. #include <bl1/bl1.h>
  9. #include <common/bl_common.h>
  10. #include <context.h>
  11. /* -----------------------------------------------------------------------------
  12. * File contains an EL2 equivalent of the EL3 vector table from:
  13. * .../bl1/aarch64/bl1_exceptions.S
  14. * -----------------------------------------------------------------------------
  15. */
  16. /* -----------------------------------------------------------------------------
  17. * Very simple stackless exception handlers used by BL1.
  18. * -----------------------------------------------------------------------------
  19. */
  20. .globl bl1_exceptions
  21. vector_base bl1_exceptions
  22. /* -----------------------------------------------------
  23. * Current EL with SP0 : 0x0 - 0x200
  24. * -----------------------------------------------------
  25. */
  26. vector_entry SynchronousExceptionSP0
  27. mov x0, #SYNC_EXCEPTION_SP_EL0
  28. bl plat_report_exception
  29. no_ret plat_panic_handler
  30. end_vector_entry SynchronousExceptionSP0
  31. vector_entry IrqSP0
  32. mov x0, #IRQ_SP_EL0
  33. bl plat_report_exception
  34. no_ret plat_panic_handler
  35. end_vector_entry IrqSP0
  36. vector_entry FiqSP0
  37. mov x0, #FIQ_SP_EL0
  38. bl plat_report_exception
  39. no_ret plat_panic_handler
  40. end_vector_entry FiqSP0
  41. vector_entry SErrorSP0
  42. mov x0, #SERROR_SP_EL0
  43. bl plat_report_exception
  44. no_ret plat_panic_handler
  45. end_vector_entry SErrorSP0
  46. /* -----------------------------------------------------
  47. * Current EL with SPx: 0x200 - 0x400
  48. * -----------------------------------------------------
  49. */
  50. vector_entry SynchronousExceptionSPx
  51. mov x0, #SYNC_EXCEPTION_SP_ELX
  52. bl plat_report_exception
  53. no_ret plat_panic_handler
  54. end_vector_entry SynchronousExceptionSPx
  55. vector_entry IrqSPx
  56. mov x0, #IRQ_SP_ELX
  57. bl plat_report_exception
  58. no_ret plat_panic_handler
  59. end_vector_entry IrqSPx
  60. vector_entry FiqSPx
  61. mov x0, #FIQ_SP_ELX
  62. bl plat_report_exception
  63. no_ret plat_panic_handler
  64. end_vector_entry FiqSPx
  65. vector_entry SErrorSPx
  66. mov x0, #SERROR_SP_ELX
  67. bl plat_report_exception
  68. no_ret plat_panic_handler
  69. end_vector_entry SErrorSPx
  70. /* -----------------------------------------------------
  71. * Lower EL using AArch64 : 0x400 - 0x600
  72. * -----------------------------------------------------
  73. */
  74. vector_entry SynchronousExceptionA64
  75. /* The current v8-R64 implementation does not support conduit calls */
  76. b el2_panic
  77. end_vector_entry SynchronousExceptionA64
  78. vector_entry IrqA64
  79. mov x0, #IRQ_AARCH64
  80. bl plat_report_exception
  81. no_ret plat_panic_handler
  82. end_vector_entry IrqA64
  83. vector_entry FiqA64
  84. mov x0, #FIQ_AARCH64
  85. bl plat_report_exception
  86. no_ret plat_panic_handler
  87. end_vector_entry FiqA64
  88. vector_entry SErrorA64
  89. mov x0, #SERROR_AARCH64
  90. bl plat_report_exception
  91. no_ret plat_panic_handler
  92. end_vector_entry SErrorA64
  93. unexpected_sync_exception:
  94. mov x0, #SYNC_EXCEPTION_AARCH64
  95. bl plat_report_exception
  96. no_ret plat_panic_handler
  97. /* -----------------------------------------------------
  98. * Save Secure/Normal world context and jump to
  99. * BL1 SMC handler.
  100. * -----------------------------------------------------
  101. */