platform.mk 6.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218
  1. #
  2. # Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
  3. #
  4. # SPDX-License-Identifier: BSD-3-Clause
  5. #
  6. include common/fdt_wrappers.mk
  7. # Include GICv2 driver files
  8. include drivers/arm/gic/v2/gicv2.mk
  9. JUNO_GIC_SOURCES := ${GICV2_SOURCES} \
  10. plat/common/plat_gicv2.c \
  11. plat/arm/common/arm_gicv2.c
  12. JUNO_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c \
  13. plat/arm/common/arm_cci.c
  14. JUNO_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
  15. plat/arm/board/juno/juno_security.c \
  16. plat/arm/board/juno/juno_trng.c \
  17. plat/arm/common/arm_tzc400.c
  18. ifneq (${ENABLE_STACK_PROTECTOR}, 0)
  19. JUNO_SECURITY_SOURCES += plat/arm/board/juno/juno_stack_protector.c
  20. endif
  21. # Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
  22. # SCP during power management operations and for SCP RAM Firmware transfer.
  23. CSS_USE_SCMI_SDS_DRIVER := 1
  24. PLAT_INCLUDES := -Iplat/arm/board/juno/include
  25. PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S \
  26. plat/arm/board/juno/juno_common.c
  27. # Flag to enable support for AArch32 state on JUNO
  28. JUNO_AARCH32_EL3_RUNTIME := 0
  29. $(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME))
  30. $(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME))
  31. # Flag to enable support for TZMP1 on JUNO
  32. JUNO_TZMP1 := 0
  33. $(eval $(call assert_boolean,JUNO_TZMP1))
  34. ifeq (${JUNO_TZMP1}, 1)
  35. ifeq (${ETHOSN_NPU_TZMP1},1)
  36. $(error JUNO_TZMP1 cannot be used together with ETHOSN_NPU_TZMP1)
  37. else
  38. $(eval $(call add_define,JUNO_TZMP1))
  39. endif
  40. endif
  41. TRNG_SUPPORT := 1
  42. ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
  43. # Include BL32 in FIP
  44. NEED_BL32 := yes
  45. # BL31 is not required
  46. override BL31_SOURCES =
  47. # The BL32 needs to be built separately invoking the AARCH32 compiler and
  48. # be specifed via `BL32` build option.
  49. ifneq (${ARCH}, aarch32)
  50. override BL32_SOURCES =
  51. endif
  52. else
  53. ifeq (${ARCH}, aarch32)
  54. $(error JUNO_AARCH32_EL3_RUNTIME has to be enabled to build BL32 for AArch32)
  55. endif
  56. endif
  57. ifeq (${ARCH},aarch64)
  58. BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \
  59. lib/cpus/aarch64/cortex_a57.S \
  60. lib/cpus/aarch64/cortex_a72.S \
  61. plat/arm/board/juno/juno_err.c \
  62. plat/arm/board/juno/juno_bl1_setup.c \
  63. drivers/arm/sp805/sp805.c \
  64. ${JUNO_INTERCONNECT_SOURCES} \
  65. ${JUNO_SECURITY_SOURCES}
  66. BL2_SOURCES += drivers/arm/sp805/sp805.c \
  67. lib/utils/mem_region.c \
  68. plat/arm/board/juno/juno_err.c \
  69. plat/arm/board/juno/juno_bl2_setup.c \
  70. plat/arm/common/arm_nor_psci_mem_protect.c \
  71. ${JUNO_SECURITY_SOURCES}
  72. BL2U_SOURCES += ${JUNO_SECURITY_SOURCES}
  73. BL31_SOURCES += drivers/cfi/v2m/v2m_flash.c \
  74. lib/cpus/aarch64/cortex_a53.S \
  75. lib/cpus/aarch64/cortex_a57.S \
  76. lib/cpus/aarch64/cortex_a72.S \
  77. lib/utils/mem_region.c \
  78. lib/fconf/fconf.c \
  79. lib/fconf/fconf_dyn_cfg_getter.c \
  80. plat/arm/board/juno/juno_bl31_setup.c \
  81. plat/arm/board/juno/juno_pm.c \
  82. plat/arm/board/juno/juno_topology.c \
  83. plat/arm/common/arm_nor_psci_mem_protect.c \
  84. ${JUNO_GIC_SOURCES} \
  85. ${JUNO_INTERCONNECT_SOURCES} \
  86. ${JUNO_SECURITY_SOURCES}
  87. BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
  88. ifeq (${CSS_USE_SCMI_SDS_DRIVER},1)
  89. BL1_SOURCES += drivers/arm/css/sds/sds.c
  90. endif
  91. ifeq (${TRUSTED_BOARD_BOOT}, 1)
  92. # Enable Juno specific TBBR images
  93. $(eval $(call add_define,PLAT_TBBR_IMG_DEF))
  94. DTC_CPPFLAGS += ${PLAT_INCLUDES}
  95. BL1_SOURCES += plat/arm/board/juno/juno_trusted_boot.c
  96. BL2_SOURCES += plat/arm/board/juno/juno_trusted_boot.c
  97. ifeq (${COT_DESC_IN_DTB},0)
  98. BL2_SOURCES += plat/arm/board/juno/juno_tbbr_cot_bl2.c
  99. endif
  100. endif
  101. endif
  102. ifneq (${RESET_TO_BL31},0)
  103. $(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \
  104. Please set RESET_TO_BL31 to 0.")
  105. endif
  106. ifeq ($(USE_ROMLIB),1)
  107. all : bl1_romlib.bin
  108. endif
  109. bl1_romlib.bin : $(BUILD_PLAT)/bl1.bin romlib.bin
  110. $(s)echo "Building combined BL1 and ROMLIB binary for Juno $@"
  111. ./lib/romlib/gen_combined_bl1_romlib.sh -o bl1_romlib.bin $(BUILD_PLAT)
  112. # Errata workarounds for Cortex-A53:
  113. ERRATA_A53_819472 := 1
  114. ERRATA_A53_824069 := 1
  115. ERRATA_A53_826319 := 1
  116. ERRATA_A53_827319 := 1
  117. ERRATA_A53_835769 := 1
  118. ERRATA_A53_836870 := 1
  119. ERRATA_A53_843419 := 1
  120. ERRATA_A53_855873 := 1
  121. # Errata workarounds for Cortex-A57:
  122. ERRATA_A57_806969 := 0
  123. ERRATA_A57_813419 := 1
  124. ERRATA_A57_813420 := 1
  125. ERRATA_A57_814670 := 1
  126. ERRATA_A57_817169 := 1
  127. ERRATA_A57_826974 := 1
  128. ERRATA_A57_826977 := 1
  129. ERRATA_A57_828024 := 1
  130. ERRATA_A57_829520 := 1
  131. ERRATA_A57_833471 := 1
  132. ERRATA_A57_859972 := 0
  133. # Errata workarounds for Cortex-A72:
  134. ERRATA_A72_859971 := 0
  135. # Enable option to skip L1 data cache flush during the Cortex-A57 cluster
  136. # power down sequence
  137. SKIP_A57_L1_FLUSH_PWR_DWN := 1
  138. # Do not enable SVE
  139. ENABLE_SVE_FOR_NS := 0
  140. # Enable the dynamic translation tables library.
  141. ifeq (${ARCH},aarch32)
  142. ifeq (${RESET_TO_SP_MIN},1)
  143. BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
  144. endif
  145. else
  146. ifeq (${RESET_TO_BL31},1)
  147. BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
  148. endif
  149. endif
  150. ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
  151. ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
  152. BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
  153. else
  154. BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
  155. endif
  156. endif
  157. BL1_CPPFLAGS += -march=armv8-a+crc
  158. BL2_CPPFLAGS += -march=armv8-a+crc
  159. BL2U_CPPFLAGS += -march=armv8-a+crc
  160. BL31_CPPFLAGS += -march=armv8-a+crc
  161. BL32_CPPFLAGS += -march=armv8-a+crc
  162. # Add the FDT_SOURCES and options for Dynamic Config
  163. FDT_SOURCES += plat/arm/board/juno/fdts/${PLAT}_fw_config.dts \
  164. plat/arm/board/juno/fdts/${PLAT}_tb_fw_config.dts \
  165. fdts/${PLAT}.dts
  166. FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
  167. TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
  168. HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
  169. # Add the FW_CONFIG to FIP and specify the same to certtool
  170. $(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
  171. # Add the TB_FW_CONFIG to FIP and specify the same to certtool
  172. $(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
  173. # Add the HW_CONFIG to FIP and specify the same to certtool
  174. $(eval $(call TOOL_ADD_PAYLOAD,${HW_CONFIG},--hw-config,${HW_CONFIG}))
  175. include drivers/arm/ethosn/ethosn_npu.mk
  176. include plat/arm/board/common/board_common.mk
  177. include plat/arm/common/arm_common.mk
  178. include plat/arm/soc/common/soc_css.mk
  179. include plat/arm/css/common/css_common.mk