arm_tzc400.c 2.1 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879
  1. /*
  2. * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <platform_def.h>
  7. #include <common/debug.h>
  8. #include <drivers/arm/tzc400.h>
  9. #include <plat/arm/common/plat_arm.h>
  10. /* Weak definitions may be overridden in specific ARM standard platform */
  11. #pragma weak plat_arm_security_setup
  12. /*******************************************************************************
  13. * Initialize the TrustZone Controller for ARM standard platforms.
  14. * When booting an EL3 payload, this is simplified: we configure region 0 with
  15. * secure access only and do not enable any other region.
  16. ******************************************************************************/
  17. void arm_tzc400_setup(uintptr_t tzc_base,
  18. const arm_tzc_regions_info_t *tzc_regions)
  19. {
  20. #ifndef EL3_PAYLOAD_BASE
  21. unsigned int region_index = 1U;
  22. const arm_tzc_regions_info_t *p;
  23. const arm_tzc_regions_info_t init_tzc_regions[] = {
  24. ARM_TZC_REGIONS_DEF,
  25. {0}
  26. };
  27. #endif
  28. INFO("Configuring TrustZone Controller\n");
  29. tzc400_init(tzc_base);
  30. /* Disable filters. */
  31. tzc400_disable_filters();
  32. #ifndef EL3_PAYLOAD_BASE
  33. if (tzc_regions == NULL)
  34. p = init_tzc_regions;
  35. else
  36. p = tzc_regions;
  37. /* Region 0 set to no access by default */
  38. tzc400_configure_region0(TZC_REGION_S_NONE, 0);
  39. /* Rest Regions set according to tzc_regions array */
  40. for (; p->base != 0ULL; p++) {
  41. tzc400_configure_region(PLAT_ARM_TZC_FILTERS, region_index,
  42. p->base, p->end, p->sec_attr, p->nsaid_permissions);
  43. region_index++;
  44. }
  45. INFO("Total %u regions set.\n", region_index);
  46. #else /* if defined(EL3_PAYLOAD_BASE) */
  47. /* Allow Secure and Non-secure access to DRAM for EL3 payloads */
  48. tzc400_configure_region0(TZC_REGION_S_RDWR, PLAT_ARM_TZC_NS_DEV_ACCESS);
  49. #endif /* EL3_PAYLOAD_BASE */
  50. /*
  51. * Raise an exception if a NS device tries to access secure memory
  52. * TODO: Add interrupt handling support.
  53. */
  54. tzc400_set_action(TZC_ACTION_ERR);
  55. /* Enable filters. */
  56. tzc400_enable_filters();
  57. }
  58. void plat_arm_security_setup(void)
  59. {
  60. arm_tzc400_setup(PLAT_ARM_TZC_BASE, NULL);
  61. }