plat_dcm.c 2.0 KB

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  1. /*
  2. * Copyright (c) 2019, MediaTek Inc. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <arch.h>
  7. #include <lib/bakery_lock.h>
  8. #include <drivers/console.h>
  9. #include <common/debug.h>
  10. #include <lib/mmio.h>
  11. #include <plat_dcm.h>
  12. #include <plat_private.h>
  13. #include <plat_dcm.h>
  14. #include <plat/common/platform.h>
  15. #include <platform_def.h>
  16. #include <mtk_plat_common.h>
  17. #define PWR_STATUS (SPM_BASE + 0x180)
  18. uint64_t plat_dcm_mcsi_a_addr;
  19. uint32_t plat_dcm_mcsi_a_val;
  20. static int plat_dcm_init_type;
  21. static unsigned int dcm_big_core_cnt;
  22. int plat_dcm_initiated;
  23. #define PWR_STA_BIG_MP_MASK (0x1 << 15)
  24. DEFINE_BAKERY_LOCK(dcm_lock);
  25. void dcm_lock_init(void)
  26. {
  27. bakery_lock_init(&dcm_lock);
  28. }
  29. void dcm_lock_get(void)
  30. {
  31. bakery_lock_get(&dcm_lock);
  32. }
  33. void dcm_lock_release(void)
  34. {
  35. bakery_lock_release(&dcm_lock);
  36. }
  37. void plat_dcm_mcsi_a_backup(void)
  38. {
  39. }
  40. void plat_dcm_mcsi_a_restore(void)
  41. {
  42. }
  43. void plat_dcm_rgu_enable(void)
  44. {
  45. }
  46. void plat_dcm_big_core_sync(short on)
  47. {
  48. /* Check if Big cluster power is existed */
  49. if (!(mmio_read_32(PWR_STATUS) & PWR_STA_BIG_MP_MASK))
  50. return;
  51. if (on) {
  52. mmio_write_32(MP2_SYNC_DCM,
  53. (mmio_read_32(MP2_SYNC_DCM) & ~MP2_SYNC_DCM_MASK)
  54. | MP2_SYNC_DCM_ON);
  55. dcm_big_core_cnt++;
  56. } else
  57. mmio_write_32(MP2_SYNC_DCM,
  58. (mmio_read_32(MP2_SYNC_DCM) & ~MP2_SYNC_DCM_MASK)
  59. | MP2_SYNC_DCM_OFF);
  60. }
  61. void plat_dcm_restore_cluster_on(unsigned long mpidr)
  62. {
  63. unsigned long cluster_id =
  64. (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS;
  65. switch (cluster_id) {
  66. case 0x1:
  67. dcm_lock_get();
  68. if (plat_dcm_init_type & BIG_CORE_DCM_TYPE)
  69. plat_dcm_big_core_sync(1);
  70. else
  71. plat_dcm_big_core_sync(0);
  72. dcm_lock_release();
  73. break;
  74. default:
  75. break;
  76. }
  77. }
  78. void plat_dcm_msg_handler(uint64_t x1)
  79. {
  80. plat_dcm_init_type = x1 & ALL_DCM_TYPE;
  81. }
  82. unsigned long plat_dcm_get_enabled_cnt(uint64_t type)
  83. {
  84. switch (type) {
  85. case BIG_CORE_DCM_TYPE:
  86. return dcm_big_core_cnt;
  87. default:
  88. return 0;
  89. }
  90. }
  91. void plat_dcm_init(void)
  92. {
  93. dcm_lock_init();
  94. }