platform.mk 3.1 KB

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  1. #
  2. # Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
  3. # Copyright (c) 2024, Mario Bălănică <mariobalanica02@gmail.com>
  4. #
  5. # SPDX-License-Identifier: BSD-3-Clause
  6. #
  7. include lib/xlat_tables_v2/xlat_tables.mk
  8. include drivers/arm/gic/v2/gicv2.mk
  9. PLAT_INCLUDES := -Iplat/rpi/common/include \
  10. -Iplat/rpi/rpi5/include
  11. PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/aarch64/pl011_console.S \
  12. plat/rpi/common/rpi3_common.c \
  13. plat/rpi/common/rpi3_console_pl011.c \
  14. ${XLAT_TABLES_LIB_SRCS}
  15. BL31_SOURCES += lib/cpus/aarch64/cortex_a76.S \
  16. plat/rpi/common/aarch64/plat_helpers.S \
  17. plat/rpi/common/aarch64/armstub8_header.S \
  18. drivers/delay_timer/delay_timer.c \
  19. plat/common/plat_gicv2.c \
  20. plat/rpi/common/rpi4_bl31_setup.c \
  21. plat/rpi/rpi5/rpi5_setup.c \
  22. plat/rpi/common/rpi3_pm.c \
  23. plat/common/plat_psci_common.c \
  24. plat/rpi/common/rpi3_topology.c \
  25. ${GICV2_SOURCES}
  26. # For now we only support BL31, using the kernel loaded by the GPU firmware.
  27. RESET_TO_BL31 := 1
  28. # All CPUs enter armstub8.bin.
  29. COLD_BOOT_SINGLE_CPU := 0
  30. # Tune compiler for Cortex-A76
  31. ifeq ($(notdir $(CC)),armclang)
  32. TF_CFLAGS_aarch64 += -mcpu=cortex-a76
  33. else ifneq ($(findstring clang,$(notdir $(CC))),)
  34. TF_CFLAGS_aarch64 += -mcpu=cortex-a76
  35. else
  36. TF_CFLAGS_aarch64 += -mtune=cortex-a76
  37. endif
  38. # Add support for platform supplied linker script for BL31 build
  39. $(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
  40. # Enable all errata workarounds for Cortex-A76 r4p1
  41. ERRATA_A76_1946160 := 1
  42. ERRATA_A76_2743102 := 1
  43. # Add new default target when compiling this platform
  44. all: bl31
  45. # Build config flags
  46. # ------------------
  47. # Disable stack protector by default
  48. ENABLE_STACK_PROTECTOR := 0
  49. # Have different sections for code and rodata
  50. SEPARATE_CODE_AND_RODATA := 1
  51. # Hardware-managed coherency
  52. HW_ASSISTED_COHERENCY := 1
  53. USE_COHERENT_MEM := 0
  54. # Cortex-A76 is 64-bit only
  55. CTX_INCLUDE_AARCH32_REGS := 0
  56. # Platform build flags
  57. # --------------------
  58. # There is not much else than a Linux kernel to load at the moment.
  59. RPI3_DIRECT_LINUX_BOOT := 1
  60. # BL33 images can only be AArch64 on this platform.
  61. RPI3_BL33_IN_AARCH32 := 0
  62. # UART to use at runtime. -1 means the runtime UART is disabled.
  63. # Any other value means the default UART will be used.
  64. RPI3_RUNTIME_UART := 0
  65. # Use normal memory mapping for ROM, FIP, SRAM and DRAM
  66. RPI3_USE_UEFI_MAP := 0
  67. # SMCCC PCI support (should be enabled for ACPI builds)
  68. SMC_PCI_SUPPORT := 0
  69. # Process platform flags
  70. # ----------------------
  71. $(eval $(call add_define,RPI3_BL33_IN_AARCH32))
  72. $(eval $(call add_define,RPI3_DIRECT_LINUX_BOOT))
  73. ifdef RPI3_PRELOADED_DTB_BASE
  74. $(eval $(call add_define,RPI3_PRELOADED_DTB_BASE))
  75. endif
  76. $(eval $(call add_define,RPI3_RUNTIME_UART))
  77. $(eval $(call add_define,RPI3_USE_UEFI_MAP))
  78. $(eval $(call add_define,SMC_PCI_SUPPORT))
  79. ifeq (${ARCH},aarch32)
  80. $(error Error: AArch32 not supported on rpi5)
  81. endif
  82. ifneq ($(ENABLE_STACK_PROTECTOR), 0)
  83. PLAT_BL_COMMON_SOURCES += drivers/rpi3/rng/rpi3_rng.c \
  84. plat/rpi/common/rpi3_stack_protector.c
  85. endif
  86. ifeq ($(SMC_PCI_SUPPORT), 1)
  87. BL31_SOURCES += plat/rpi/common/rpi_pci_svc.c
  88. endif