tzc400.c 9.6 KB

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  1. /*
  2. * Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <assert.h>
  7. #include <stddef.h>
  8. #include <common/debug.h>
  9. #include <drivers/arm/tzc400.h>
  10. #include <lib/mmio.h>
  11. #include <lib/utils_def.h>
  12. #include "tzc_common_private.h"
  13. /*
  14. * Macros which will be used by common core functions.
  15. */
  16. #define TZC_400_REGION_BASE_LOW_0_OFFSET U(0x100)
  17. #define TZC_400_REGION_BASE_HIGH_0_OFFSET U(0x104)
  18. #define TZC_400_REGION_TOP_LOW_0_OFFSET U(0x108)
  19. #define TZC_400_REGION_TOP_HIGH_0_OFFSET U(0x10c)
  20. #define TZC_400_REGION_ATTR_0_OFFSET U(0x110)
  21. #define TZC_400_REGION_ID_ACCESS_0_OFFSET U(0x114)
  22. /*
  23. * Implementation defined values used to validate inputs later.
  24. * Filters : max of 4 ; 0 to 3
  25. * Regions : max of 9 ; 0 to 8
  26. * Address width : Values between 32 to 64
  27. */
  28. typedef struct tzc400_instance {
  29. uintptr_t base;
  30. uint8_t addr_width;
  31. uint8_t num_filters;
  32. uint8_t num_regions;
  33. } tzc400_instance_t;
  34. static tzc400_instance_t tzc400;
  35. static inline unsigned int _tzc400_read_build_config(uintptr_t base)
  36. {
  37. return mmio_read_32(base + BUILD_CONFIG_OFF);
  38. }
  39. static inline unsigned int _tzc400_read_gate_keeper(uintptr_t base)
  40. {
  41. return mmio_read_32(base + GATE_KEEPER_OFF);
  42. }
  43. static inline void _tzc400_write_gate_keeper(uintptr_t base, unsigned int val)
  44. {
  45. mmio_write_32(base + GATE_KEEPER_OFF, val);
  46. }
  47. /*
  48. * Get the open status information for all filter units.
  49. */
  50. #define get_gate_keeper_os(_base) ((_tzc400_read_gate_keeper(_base) >> \
  51. GATE_KEEPER_OS_SHIFT) & \
  52. GATE_KEEPER_OS_MASK)
  53. /* Define common core functions used across different TZC peripherals. */
  54. DEFINE_TZC_COMMON_WRITE_ACTION(400, 400)
  55. DEFINE_TZC_COMMON_WRITE_REGION_BASE(400, 400)
  56. DEFINE_TZC_COMMON_WRITE_REGION_TOP(400, 400)
  57. DEFINE_TZC_COMMON_WRITE_REGION_ATTRIBUTES(400, 400)
  58. DEFINE_TZC_COMMON_WRITE_REGION_ID_ACCESS(400, 400)
  59. DEFINE_TZC_COMMON_UPDATE_FILTERS(400, 400)
  60. DEFINE_TZC_COMMON_CONFIGURE_REGION0(400)
  61. DEFINE_TZC_COMMON_CONFIGURE_REGION(400)
  62. static void _tzc400_clear_it(uintptr_t base, uint32_t filter)
  63. {
  64. mmio_write_32(base + INT_CLEAR, BIT_32(filter));
  65. }
  66. static uint32_t _tzc400_get_int_by_filter(uintptr_t base, uint32_t filter)
  67. {
  68. return mmio_read_32(base + INT_STATUS) & BIT_32(filter);
  69. }
  70. #if DEBUG
  71. static unsigned long _tzc400_get_fail_address(uintptr_t base, uint32_t filter)
  72. {
  73. unsigned long fail_address;
  74. fail_address = mmio_read_32(base + FAIL_ADDRESS_LOW_OFF +
  75. (filter * FILTER_OFFSET));
  76. #ifdef __aarch64__
  77. fail_address += (unsigned long)mmio_read_32(base + FAIL_ADDRESS_HIGH_OFF +
  78. (filter * FILTER_OFFSET)) << 32;
  79. #endif
  80. return fail_address;
  81. }
  82. static uint32_t _tzc400_get_fail_id(uintptr_t base, uint32_t filter)
  83. {
  84. return mmio_read_32(base + FAIL_ID + (filter * FILTER_OFFSET));
  85. }
  86. static uint32_t _tzc400_get_fail_control(uintptr_t base, uint32_t filter)
  87. {
  88. return mmio_read_32(base + FAIL_CONTROL_OFF + (filter * FILTER_OFFSET));
  89. }
  90. static void _tzc400_dump_fail_filter(uintptr_t base, uint32_t filter)
  91. {
  92. uint32_t control_fail;
  93. uint32_t fail_id;
  94. unsigned long address_fail;
  95. address_fail = _tzc400_get_fail_address(base, filter);
  96. ERROR("Illegal access to 0x%lx:\n", address_fail);
  97. fail_id = _tzc400_get_fail_id(base, filter);
  98. ERROR("\tFAIL_ID = 0x%x\n", fail_id);
  99. control_fail = _tzc400_get_fail_control(base, filter);
  100. if (((control_fail & BIT_32(FAIL_CONTROL_NS_SHIFT)) >> FAIL_CONTROL_NS_SHIFT) ==
  101. FAIL_CONTROL_NS_NONSECURE) {
  102. ERROR("\tNon-Secure\n");
  103. } else {
  104. ERROR("\tSecure\n");
  105. }
  106. if (((control_fail & BIT_32(FAIL_CONTROL_PRIV_SHIFT)) >> FAIL_CONTROL_PRIV_SHIFT) ==
  107. FAIL_CONTROL_PRIV_PRIV) {
  108. ERROR("\tPrivilege\n");
  109. } else {
  110. ERROR("\tUnprivilege\n");
  111. }
  112. if (((control_fail & BIT_32(FAIL_CONTROL_DIR_SHIFT)) >> FAIL_CONTROL_DIR_SHIFT) ==
  113. FAIL_CONTROL_DIR_WRITE) {
  114. ERROR("\tWrite\n");
  115. } else {
  116. ERROR("\tRead\n");
  117. }
  118. }
  119. #endif /* DEBUG */
  120. static unsigned int _tzc400_get_gate_keeper(uintptr_t base,
  121. unsigned int filter)
  122. {
  123. unsigned int open_status;
  124. open_status = get_gate_keeper_os(base);
  125. return (open_status >> filter) & GATE_KEEPER_FILTER_MASK;
  126. }
  127. /* This function is not MP safe. */
  128. static void _tzc400_set_gate_keeper(uintptr_t base,
  129. unsigned int filter,
  130. int val)
  131. {
  132. unsigned int open_status;
  133. /* Upper half is current state. Lower half is requested state. */
  134. open_status = get_gate_keeper_os(base);
  135. if (val != 0)
  136. open_status |= (1UL << filter);
  137. else
  138. open_status &= ~(1UL << filter);
  139. _tzc400_write_gate_keeper(base, (open_status & GATE_KEEPER_OR_MASK) <<
  140. GATE_KEEPER_OR_SHIFT);
  141. /* Wait here until we see the change reflected in the TZC status. */
  142. while ((get_gate_keeper_os(base)) != open_status)
  143. ;
  144. }
  145. void tzc400_set_action(unsigned int action)
  146. {
  147. assert(tzc400.base != 0U);
  148. assert(action <= TZC_ACTION_ERR_INT);
  149. _tzc400_write_action(tzc400.base, action);
  150. }
  151. void tzc400_init(uintptr_t base)
  152. {
  153. #if DEBUG
  154. unsigned int tzc400_id;
  155. #endif
  156. unsigned int tzc400_build;
  157. assert(base != 0U);
  158. tzc400.base = base;
  159. #if DEBUG
  160. tzc400_id = _tzc_read_peripheral_id(base);
  161. if (tzc400_id != TZC_400_PERIPHERAL_ID) {
  162. ERROR("TZC-400 : Wrong device ID (0x%x).\n", tzc400_id);
  163. panic();
  164. }
  165. #endif
  166. /* Save values we will use later. */
  167. tzc400_build = _tzc400_read_build_config(tzc400.base);
  168. tzc400.num_filters = (uint8_t)((tzc400_build >> BUILD_CONFIG_NF_SHIFT) &
  169. BUILD_CONFIG_NF_MASK) + 1U;
  170. tzc400.addr_width = (uint8_t)((tzc400_build >> BUILD_CONFIG_AW_SHIFT) &
  171. BUILD_CONFIG_AW_MASK) + 1U;
  172. tzc400.num_regions = (uint8_t)((tzc400_build >> BUILD_CONFIG_NR_SHIFT) &
  173. BUILD_CONFIG_NR_MASK) + 1U;
  174. }
  175. /*
  176. * `tzc400_configure_region0` is used to program region 0 into the TrustZone
  177. * controller. Region 0 covers the whole address space that is not mapped
  178. * to any other region, and is enabled on all filters; this cannot be
  179. * changed. This function only changes the access permissions.
  180. */
  181. void tzc400_configure_region0(unsigned int sec_attr,
  182. unsigned int ns_device_access)
  183. {
  184. assert(tzc400.base != 0U);
  185. assert(sec_attr <= TZC_REGION_S_RDWR);
  186. _tzc400_configure_region0(tzc400.base, sec_attr, ns_device_access);
  187. }
  188. /*
  189. * `tzc400_configure_region` is used to program regions into the TrustZone
  190. * controller. A region can be associated with more than one filter. The
  191. * associated filters are passed in as a bitmap (bit0 = filter0), except that
  192. * the value TZC_400_REGION_ATTR_FILTER_BIT_ALL selects all filters, based on
  193. * the value of tzc400.num_filters.
  194. * NOTE:
  195. * Region 0 is special; it is preferable to use tzc400_configure_region0
  196. * for this region (see comment for that function).
  197. */
  198. void tzc400_configure_region(unsigned int filters,
  199. unsigned int region,
  200. unsigned long long region_base,
  201. unsigned long long region_top,
  202. unsigned int sec_attr,
  203. unsigned int nsaid_permissions)
  204. {
  205. assert(tzc400.base != 0U);
  206. /* Adjust filter mask by real filter number */
  207. if (filters == TZC_400_REGION_ATTR_FILTER_BIT_ALL) {
  208. filters = (1U << tzc400.num_filters) - 1U;
  209. }
  210. /* Do range checks on filters and regions. */
  211. assert(((filters >> tzc400.num_filters) == 0U) &&
  212. (region < tzc400.num_regions));
  213. /*
  214. * Do address range check based on TZC configuration. A 64bit address is
  215. * the max and expected case.
  216. */
  217. assert((region_top <= (UINT64_MAX >> (64U - tzc400.addr_width))) &&
  218. (region_base < region_top));
  219. /* region_base and (region_top + 1) must be 4KB aligned */
  220. assert(((region_base | (region_top + 1U)) & (4096U - 1U)) == 0U);
  221. assert(sec_attr <= TZC_REGION_S_RDWR);
  222. _tzc400_configure_region(tzc400.base, filters, region, region_base,
  223. region_top,
  224. sec_attr, nsaid_permissions);
  225. }
  226. void tzc400_update_filters(unsigned int region, unsigned int filters)
  227. {
  228. /* Do range checks on filters and regions. */
  229. assert(((filters >> tzc400.num_filters) == 0U) &&
  230. (region < tzc400.num_regions));
  231. _tzc400_update_filters(tzc400.base, region, tzc400.num_filters, filters);
  232. }
  233. void tzc400_enable_filters(void)
  234. {
  235. unsigned int state;
  236. unsigned int filter;
  237. assert(tzc400.base != 0U);
  238. for (filter = 0U; filter < tzc400.num_filters; filter++) {
  239. state = _tzc400_get_gate_keeper(tzc400.base, filter);
  240. if (state != 0U) {
  241. /* Filter 0 is special and cannot be disabled.
  242. * So here we allow it being already enabled. */
  243. if (filter == 0U) {
  244. continue;
  245. }
  246. /*
  247. * The TZC filter is already configured. Changing the
  248. * programmer's view in an active system can cause
  249. * unpredictable behavior therefore panic for now rather
  250. * than try to determine whether this is safe in this
  251. * instance.
  252. *
  253. * See the 'ARM (R) CoreLink TM TZC-400 TrustZone (R)
  254. * Address Space Controller' Technical Reference Manual.
  255. */
  256. ERROR("TZC-400 : Filter %u Gatekeeper already enabled.\n",
  257. filter);
  258. panic();
  259. }
  260. _tzc400_set_gate_keeper(tzc400.base, filter, 1);
  261. }
  262. }
  263. void tzc400_disable_filters(void)
  264. {
  265. unsigned int filter;
  266. unsigned int state;
  267. unsigned int start = 0U;
  268. assert(tzc400.base != 0U);
  269. /* Filter 0 is special and cannot be disabled. */
  270. state = _tzc400_get_gate_keeper(tzc400.base, 0);
  271. if (state != 0U) {
  272. start++;
  273. }
  274. for (filter = start; filter < tzc400.num_filters; filter++)
  275. _tzc400_set_gate_keeper(tzc400.base, filter, 0);
  276. }
  277. int tzc400_it_handler(void)
  278. {
  279. uint32_t filter;
  280. uint32_t filter_it_pending = tzc400.num_filters;
  281. assert(tzc400.base != 0U);
  282. for (filter = 0U; filter < tzc400.num_filters; filter++) {
  283. if (_tzc400_get_int_by_filter(tzc400.base, filter) != 0U) {
  284. filter_it_pending = filter;
  285. break;
  286. }
  287. }
  288. if (filter_it_pending == tzc400.num_filters) {
  289. ERROR("TZC-400: No interrupt pending!\n");
  290. return -1;
  291. }
  292. #if DEBUG
  293. _tzc400_dump_fail_filter(tzc400.base, filter_it_pending);
  294. #endif
  295. _tzc400_clear_it(tzc400.base, filter_it_pending);
  296. return 0;
  297. }