tzc_dmc500.c 8.5 KB

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  1. /*
  2. * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <assert.h>
  7. #include <common/debug.h>
  8. #include <drivers/arm/tzc_dmc500.h>
  9. #include <drivers/arm/tzc_common.h>
  10. #include <lib/mmio.h>
  11. #include "tzc_common_private.h"
  12. /*
  13. * Macros which will be used by common core functions.
  14. */
  15. #define TZC_DMC500_REGION_BASE_LOW_0_OFFSET 0x054
  16. #define TZC_DMC500_REGION_BASE_HIGH_0_OFFSET 0x058
  17. #define TZC_DMC500_REGION_TOP_LOW_0_OFFSET 0x05C
  18. #define TZC_DMC500_REGION_TOP_HIGH_0_OFFSET 0x060
  19. #define TZC_DMC500_REGION_ATTR_0_OFFSET 0x064
  20. #define TZC_DMC500_REGION_ID_ACCESS_0_OFFSET 0x068
  21. #define TZC_DMC500_ACTION_OFF 0x50
  22. /* Pointer to the tzc_dmc500_driver_data structure populated by the platform */
  23. static const tzc_dmc500_driver_data_t *g_driver_data;
  24. static unsigned int g_sys_if_count;
  25. #define verify_region_attr(region, attr) \
  26. ((g_conf_regions[(region)].sec_attr == \
  27. ((attr) >> TZC_REGION_ATTR_SEC_SHIFT)) \
  28. && ((attr) & (0x1 << TZC_REGION_ATTR_F_EN_SHIFT)))
  29. /*
  30. * Structure for configured regions attributes in DMC500.
  31. */
  32. typedef struct tzc_dmc500_regions {
  33. unsigned int sec_attr;
  34. int is_enabled;
  35. } tzc_dmc500_regions_t;
  36. /*
  37. * Array storing the attributes of the configured regions. This array
  38. * will be used by the `tzc_dmc500_verify_complete` to verify the flush
  39. * completion.
  40. */
  41. static tzc_dmc500_regions_t g_conf_regions[MAX_REGION_VAL + 1];
  42. /* Helper Macros for making the code readable */
  43. #define DMC_INST_BASE_ADDR(instance) (g_driver_data->dmc_base[instance])
  44. #define DMC_INST_SI_BASE(instance, interface) \
  45. (DMC_INST_BASE_ADDR(instance) + IFACE_OFFSET(interface))
  46. DEFINE_TZC_COMMON_WRITE_ACTION(_dmc500, DMC500)
  47. DEFINE_TZC_COMMON_WRITE_REGION_BASE(_dmc500, DMC500)
  48. DEFINE_TZC_COMMON_WRITE_REGION_TOP(_dmc500, DMC500)
  49. DEFINE_TZC_COMMON_WRITE_REGION_ATTRIBUTES(_dmc500, DMC500)
  50. DEFINE_TZC_COMMON_WRITE_REGION_ID_ACCESS(_dmc500, DMC500)
  51. DEFINE_TZC_COMMON_CONFIGURE_REGION0(_dmc500)
  52. DEFINE_TZC_COMMON_CONFIGURE_REGION(_dmc500)
  53. static inline unsigned int _tzc_dmc500_read_region_attr_0(
  54. uintptr_t dmc_si_base,
  55. unsigned int region_no)
  56. {
  57. return mmio_read_32(dmc_si_base +
  58. TZC_REGION_OFFSET(TZC_DMC500_REGION_SIZE, region_no) +
  59. TZC_DMC500_REGION_ATTR_0_OFFSET);
  60. }
  61. static inline void _tzc_dmc500_write_flush_control(uintptr_t dmc_si_base)
  62. {
  63. mmio_write_32(dmc_si_base + SI_FLUSH_CTRL_OFFSET, 1);
  64. }
  65. /*
  66. * Sets the Flush controls for all the DMC Instances and System Interfaces.
  67. * This initiates the flush of configuration settings from the shadow
  68. * registers to the actual configuration register. The caller should poll
  69. * changed register to confirm update.
  70. */
  71. void tzc_dmc500_config_complete(void)
  72. {
  73. int dmc_inst, sys_if;
  74. assert(g_driver_data);
  75. for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
  76. assert(DMC_INST_BASE_ADDR(dmc_inst));
  77. for (sys_if = 0; sys_if < g_sys_if_count; sys_if++)
  78. _tzc_dmc500_write_flush_control(
  79. DMC_INST_SI_BASE(dmc_inst, sys_if));
  80. }
  81. }
  82. /*
  83. * This function reads back the secure attributes from the configuration
  84. * register for each DMC Instance and System Interface and compares it with
  85. * the configured value. The successful verification of the region attributes
  86. * confirms that the flush operation has completed.
  87. * If the verification fails, the caller is expected to invoke this API again
  88. * till it succeeds.
  89. * Returns 0 on success and 1 on failure.
  90. */
  91. int tzc_dmc500_verify_complete(void)
  92. {
  93. int dmc_inst, sys_if, region_no;
  94. unsigned int attr;
  95. assert(g_driver_data);
  96. /* Region 0 must be configured */
  97. assert(g_conf_regions[0].is_enabled);
  98. /* Iterate over all configured regions */
  99. for (region_no = 0; region_no <= MAX_REGION_VAL; region_no++) {
  100. if (!g_conf_regions[region_no].is_enabled)
  101. continue;
  102. for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count;
  103. dmc_inst++) {
  104. assert(DMC_INST_BASE_ADDR(dmc_inst));
  105. for (sys_if = 0; sys_if < g_sys_if_count;
  106. sys_if++) {
  107. attr = _tzc_dmc500_read_region_attr_0(
  108. DMC_INST_SI_BASE(dmc_inst, sys_if),
  109. region_no);
  110. VERBOSE("Verifying DMC500 region:%d"
  111. " dmc_inst:%d sys_if:%d attr:%x\n",
  112. region_no, dmc_inst, sys_if, attr);
  113. if (!verify_region_attr(region_no, attr))
  114. return 1;
  115. }
  116. }
  117. }
  118. return 0;
  119. }
  120. /*
  121. * `tzc_dmc500_configure_region0` is used to program region 0 in both the
  122. * system interfaces of all the DMC-500 instances. Region 0 covers the whole
  123. * address space that is not mapped to any other region for a system interface,
  124. * and is always enabled; this cannot be changed. This function only changes
  125. * the access permissions.
  126. */
  127. void tzc_dmc500_configure_region0(unsigned int sec_attr,
  128. unsigned int nsaid_permissions)
  129. {
  130. int dmc_inst, sys_if;
  131. /* Assert if DMC-500 is not initialized */
  132. assert(g_driver_data);
  133. /* Configure region_0 in all DMC instances */
  134. for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
  135. assert(DMC_INST_BASE_ADDR(dmc_inst));
  136. for (sys_if = 0; sys_if < g_sys_if_count; sys_if++)
  137. _tzc_dmc500_configure_region0(
  138. DMC_INST_SI_BASE(dmc_inst, sys_if),
  139. sec_attr, nsaid_permissions);
  140. }
  141. g_conf_regions[0].sec_attr = sec_attr;
  142. g_conf_regions[0].is_enabled = 1;
  143. }
  144. /*
  145. * `tzc_dmc500_configure_region` is used to program a region into all system
  146. * interfaces of all the DMC instances.
  147. * NOTE:
  148. * Region 0 is special; it is preferable to use tzc_dmc500_configure_region0
  149. * for this region (see comment for that function).
  150. */
  151. void tzc_dmc500_configure_region(unsigned int region_no,
  152. unsigned long long region_base,
  153. unsigned long long region_top,
  154. unsigned int sec_attr,
  155. unsigned int nsaid_permissions)
  156. {
  157. int dmc_inst, sys_if;
  158. assert(g_driver_data);
  159. /* Do range checks on regions. */
  160. assert((region_no >= 0U) && (region_no <= MAX_REGION_VAL));
  161. /*
  162. * Do address range check based on DMC-TZ configuration. A 43bit address
  163. * is the max and expected case.
  164. */
  165. assert(((region_top <= (UINT64_MAX >> (64U - 43U))) &&
  166. (region_base < region_top)));
  167. /* region_base and (region_top + 1) must be 4KB aligned */
  168. assert(((region_base | (region_top + 1U)) & (4096U - 1U)) == 0U);
  169. for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
  170. assert(DMC_INST_BASE_ADDR(dmc_inst));
  171. for (sys_if = 0; sys_if < g_sys_if_count; sys_if++)
  172. _tzc_dmc500_configure_region(
  173. DMC_INST_SI_BASE(dmc_inst, sys_if),
  174. TZC_DMC500_REGION_ATTR_F_EN_MASK,
  175. region_no, region_base, region_top,
  176. sec_attr, nsaid_permissions);
  177. }
  178. g_conf_regions[region_no].sec_attr = sec_attr;
  179. g_conf_regions[region_no].is_enabled = 1;
  180. }
  181. /* Sets the action value for all the DMC instances */
  182. void tzc_dmc500_set_action(unsigned int action)
  183. {
  184. int dmc_inst;
  185. assert(g_driver_data);
  186. for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
  187. assert(DMC_INST_BASE_ADDR(dmc_inst));
  188. /*
  189. * - Currently no handler is provided to trap an error via
  190. * interrupt or exception.
  191. * - The interrupt action has not been tested.
  192. */
  193. _tzc_dmc500_write_action(DMC_INST_BASE_ADDR(dmc_inst), action);
  194. }
  195. }
  196. /*
  197. * A DMC-500 instance must be present at each base address provided by the
  198. * platform. It also expects platform to pass at least one instance of
  199. * DMC-500.
  200. */
  201. static void validate_plat_driver_data(
  202. const tzc_dmc500_driver_data_t *plat_driver_data)
  203. {
  204. #if ENABLE_ASSERTIONS
  205. int i;
  206. unsigned int dmc_id;
  207. uintptr_t dmc_base;
  208. assert(plat_driver_data);
  209. assert(plat_driver_data->dmc_count > 0 &&
  210. (plat_driver_data->dmc_count <= MAX_DMC_COUNT));
  211. for (i = 0; i < plat_driver_data->dmc_count; i++) {
  212. dmc_base = plat_driver_data->dmc_base[i];
  213. assert(dmc_base);
  214. dmc_id = _tzc_read_peripheral_id(dmc_base);
  215. assert(dmc_id == DMC500_PERIPHERAL_ID);
  216. }
  217. #endif /* ENABLE_ASSERTIONS */
  218. }
  219. /*
  220. * Initializes the base address and count of DMC instances.
  221. *
  222. * Note : Only pointer to plat_driver_data is saved, so it is caller's
  223. * responsibility to keep it valid until the driver is used.
  224. */
  225. void tzc_dmc500_driver_init(const tzc_dmc500_driver_data_t *plat_driver_data)
  226. {
  227. /* Check valid pointer is passed */
  228. assert(plat_driver_data);
  229. /*
  230. * NOTE: This driver expects the DMC-500 controller is already in
  231. * READY state. Hence, it uses the reconfiguration method for
  232. * programming TrustZone regions
  233. */
  234. /* Validates the information passed by platform */
  235. validate_plat_driver_data(plat_driver_data);
  236. g_driver_data = plat_driver_data;
  237. /* Check valid system interface count */
  238. assert(g_driver_data->sys_if_count <= MAX_SYS_IF_COUNT);
  239. g_sys_if_count = g_driver_data->sys_if_count;
  240. /* If interface count is not present then assume max */
  241. if (g_sys_if_count == 0U)
  242. g_sys_if_count = MAX_SYS_IF_COUNT;
  243. }