plat_ipi.h 2.2 KB

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  1. /*
  2. * Copyright (c) 2022, Xilinx, Inc. All rights reserved.
  3. * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: BSD-3-Clause
  6. */
  7. /* Versal Gen 2 IPI management enums and defines */
  8. #ifndef PLAT_IPI_H
  9. #define PLAT_IPI_H
  10. #include <stdint.h>
  11. #include <ipi.h>
  12. /*********************************************************************
  13. * IPI agent IDs macros
  14. ********************************************************************/
  15. #define IPI_ID_PMC 1U
  16. #define IPI_ID_APU 2U
  17. #define IPI_ID_RPU0 3U
  18. #define IPI_ID_RPU1 4U
  19. #define IPI_ID_3 5U
  20. #define IPI_ID_4 6U
  21. #define IPI_ID_5 7U
  22. #define IPI_ID_MAX 8U
  23. /*********************************************************************
  24. * IPI message buffers
  25. ********************************************************************/
  26. #define IPI_BUFFER_BASEADDR (0xEB3F0000U)
  27. #define IPI_LOCAL_ID IPI_ID_APU
  28. #define IPI_REMOTE_ID IPI_ID_PMC
  29. #define IPI_BUFFER_LOCAL_BASE (IPI_BUFFER_BASEADDR + (IPI_LOCAL_ID * 0x200U))
  30. #define IPI_BUFFER_REMOTE_BASE (IPI_BUFFER_BASEADDR + (IPI_REMOTE_ID * 0x200U))
  31. #define IPI_BUFFER_TARGET_LOCAL_OFFSET (IPI_LOCAL_ID * 0x40U)
  32. #define IPI_BUFFER_TARGET_REMOTE_OFFSET (IPI_REMOTE_ID * 0x40U)
  33. #define IPI_BUFFER_MAX_WORDS 8
  34. #define IPI_BUFFER_REQ_OFFSET 0x0U
  35. #define IPI_BUFFER_RESP_OFFSET 0x20U
  36. /*********************************************************************
  37. * Platform specific IPI API declarations
  38. ********************************************************************/
  39. /* Configure IPI table */
  40. extern void soc_ipi_config_table_init(void);
  41. /*******************************************************************************
  42. * IPI registers and bitfields
  43. ******************************************************************************/
  44. #define IPI0_REG_BASE (0xEB330000U)
  45. #define IPI0_TRIG_BIT (1 << 2)
  46. #define PMC_IPI_TRIG_BIT (1 << 1)
  47. #define IPI1_REG_BASE (0xEB340000U)
  48. #define IPI1_TRIG_BIT (1 << 3)
  49. #define IPI2_REG_BASE (0xEB350000U)
  50. #define IPI2_TRIG_BIT (1 << 4)
  51. #define IPI3_REG_BASE (0xEB360000U)
  52. #define IPI3_TRIG_BIT (1 << 5)
  53. #define IPI4_REG_BASE (0xEB370000U)
  54. #define IPI4_TRIG_BIT (1 << 6)
  55. #define IPI5_REG_BASE (0xEB380000U)
  56. #define IPI5_TRIG_BIT (1 << 7)
  57. #endif /* PLAT_IPI_H */