fvp_fw_config.dts 1.3 KB

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  1. /*
  2. * Copyright (c) 2019-2024, Arm Limited. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <common/tbbr/tbbr_img_def.h>
  7. #include <platform_def.h>
  8. /dts-v1/;
  9. / {
  10. dtb-registry {
  11. compatible = "fconf,dyn_cfg-dtb_registry";
  12. tb_fw-config {
  13. load-address = <0x0 0x4001300>;
  14. max-size = <0x1800>;
  15. id = <TB_FW_CONFIG_ID>;
  16. };
  17. hw-config {
  18. load-address = <0x0 0x07f00000>;
  19. max-size = <PLAT_ARM_HW_CONFIG_SIZE>;
  20. id = <HW_CONFIG_ID>;
  21. secondary-load-address = <0x0 0x82000000>;
  22. };
  23. /*
  24. * Load SoC and TOS firmware configs at the base of
  25. * non shared SRAM. The runtime checks ensure we don't
  26. * overlap BL2, BL31 or BL32. The NT firmware config
  27. * is loaded at base of DRAM.
  28. */
  29. soc_fw-config {
  30. load-address = <0x0 0x04001300>;
  31. max-size = <0x200>;
  32. id = <SOC_FW_CONFIG_ID>;
  33. };
  34. /* If required, SPD should enable loading of trusted OS fw config */
  35. #if defined(SPD_tspd) || defined(SPD_spmd)
  36. tos_fw-config {
  37. load-address = <0x0 0x04001500>;
  38. #if ENABLE_RME
  39. secondary-load-address = <0x0 0x7e00000>;
  40. #endif /* ENABLE_RME */
  41. max-size = <0xB00>;
  42. id = <TOS_FW_CONFIG_ID>;
  43. };
  44. #endif
  45. nt_fw-config {
  46. load-address = <0x0 0x80000000>;
  47. max-size = <0x200>;
  48. id = <NT_FW_CONFIG_ID>;
  49. };
  50. };
  51. };