morello_topology.c 2.1 KB

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  1. /*
  2. * Copyright (c) 2020, Arm Limited. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <lib/cassert.h>
  7. #include <plat/arm/common/plat_arm.h>
  8. /* Compile time assertion to ensure the core count is 4 */
  9. CASSERT(PLATFORM_CORE_COUNT == 4U, assert_invalid_platform_core_count);
  10. /* Topology */
  11. typedef struct morello_topology {
  12. const unsigned char *power_tree;
  13. unsigned int plat_cluster_core_count;
  14. } morello_topology_t;
  15. /*
  16. * The power domain tree descriptor. The cluster power domains are
  17. * arranged so that when the PSCI generic code creates the power domain tree,
  18. * the indices of the CPU power domain nodes it allocates match the linear
  19. * indices returned by plat_core_pos_by_mpidr().
  20. */
  21. const unsigned char morello_pd_tree_desc[] = {
  22. PLAT_MORELLO_CHIP_COUNT,
  23. PLAT_ARM_CLUSTER_COUNT,
  24. MORELLO_MAX_CPUS_PER_CLUSTER,
  25. MORELLO_MAX_CPUS_PER_CLUSTER,
  26. };
  27. /* Topology configuration for morello */
  28. const morello_topology_t morello_topology = {
  29. .power_tree = morello_pd_tree_desc,
  30. .plat_cluster_core_count = MORELLO_MAX_CPUS_PER_CLUSTER
  31. };
  32. /*******************************************************************************
  33. * This function returns the topology tree information.
  34. ******************************************************************************/
  35. const unsigned char *plat_get_power_domain_tree_desc(void)
  36. {
  37. return morello_topology.power_tree;
  38. }
  39. /*******************************************************************************
  40. * This function returns the core count within the cluster corresponding to
  41. * `mpidr`.
  42. ******************************************************************************/
  43. unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr)
  44. {
  45. return morello_topology.plat_cluster_core_count;
  46. }
  47. /*******************************************************************************
  48. * The array mapping platform core position (implemented by plat_my_core_pos())
  49. * to the SCMI power domain ID implemented by SCP.
  50. ******************************************************************************/
  51. const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[PLATFORM_CORE_COUNT] = {
  52. 0, 1, 2, 3};