plat_macros.S 2.0 KB

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  1. /*
  2. * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef PLAT_MACROS_S
  7. #define PLAT_MACROS_S
  8. #include <drivers/arm/cci.h>
  9. #include <drivers/arm/gicv2.h>
  10. #include <hi3660.h>
  11. #include <platform_def.h>
  12. .section .rodata.gic_reg_name, "aS"
  13. gicc_regs:
  14. .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
  15. gicd_pend_reg:
  16. .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n"
  17. newline:
  18. .asciz "\n"
  19. spacer:
  20. .asciz ":\t\t0x"
  21. .section .rodata.cci_reg_name, "aS"
  22. cci_iface_regs:
  23. .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
  24. /* ---------------------------------------------
  25. * The below macro prints out relevant GIC
  26. * registers whenever an unhandled exception is
  27. * taken in BL31.
  28. * ---------------------------------------------
  29. */
  30. .macro plat_crash_print_regs
  31. mov_imm x16, GICD_REG_BASE
  32. mov_imm x17, GICC_REG_BASE
  33. /* Load the gicc reg list to x6 */
  34. adr x6, gicc_regs
  35. /* Load the gicc regs to gp regs used by str_in_crash_buf_print */
  36. ldr w8, [x17, #GICC_HPPIR]
  37. ldr w9, [x17, #GICC_AHPPIR]
  38. ldr w10, [x17, #GICC_CTLR]
  39. /* Store to the crash buf and print to cosole */
  40. bl str_in_crash_buf_print
  41. /* Print the GICD_ISPENDR regs */
  42. add x7, x16, #GICD_ISPENDR
  43. adr x4, gicd_pend_reg
  44. bl asm_print_str
  45. 2:
  46. sub x4, x7, x16
  47. cmp x4, #0x280
  48. b.eq 1f
  49. bl asm_print_hex
  50. adr x4, spacer
  51. bl asm_print_str
  52. ldr x4, [x7], #8
  53. bl asm_print_hex
  54. adr x4, newline
  55. bl asm_print_str
  56. b 2b
  57. 1:
  58. adr x6, cci_iface_regs
  59. /* Store in x7 the base address of the first interface */
  60. mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \
  61. CCI400_SL_IFACE3_CLUSTER_IX))
  62. ldr w8, [x7, #SNOOP_CTRL_REG]
  63. /* Store in x7 the base address of the second interface */
  64. mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \
  65. CCI400_SL_IFACE4_CLUSTER_IX))
  66. ldr w9, [x7, #SNOOP_CTRL_REG]
  67. /* Store to the crash buf and print to console */
  68. bl str_in_crash_buf_print
  69. .endm
  70. #endif /* PLAT_MACROS_S */