mt_spm_rc_syspll.c 4.5 KB

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  1. /*
  2. * Copyright (c) 2020, MediaTek Inc. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <common/debug.h>
  7. #include <mt_lp_rm.h>
  8. #include <mt_spm.h>
  9. #include <mt_spm_cond.h>
  10. #include <mt_spm_constraint.h>
  11. #include <mt_spm_conservation.h>
  12. #include <mt_spm_idle.h>
  13. #include <mt_spm_internal.h>
  14. #include <mt_spm_notifier.h>
  15. #include <mt_spm_rc_internal.h>
  16. #include <mt_spm_reg.h>
  17. #include <mt_spm_resource_req.h>
  18. #include <mt_spm_suspend.h>
  19. #include <plat_pm.h>
  20. #include <plat_mtk_lpm.h>
  21. #define CONSTRAINT_SYSPLL_ALLOW \
  22. (MT_RM_CONSTRAINT_ALLOW_CPU_BUCK_OFF | \
  23. MT_RM_CONSTRAINT_ALLOW_DRAM_S0 | \
  24. MT_RM_CONSTRAINT_ALLOW_DRAM_S1 | \
  25. MT_RM_CONSTRAINT_ALLOW_VCORE_LP)
  26. #define CONSTRAINT_SYSPLL_PCM_FLAG \
  27. (SPM_FLAG_DISABLE_INFRA_PDN | \
  28. SPM_FLAG_DISABLE_VCORE_DVS | \
  29. SPM_FLAG_DISABLE_VCORE_DFS | \
  30. SPM_FLAG_SRAM_SLEEP_CTRL | \
  31. SPM_FLAG_KEEP_CSYSPWRACK_HIGH | \
  32. SPM_FLAG_ENABLE_6315_CTRL | \
  33. SPM_FLAG_USE_SRCCLKENO2)
  34. #define CONSTRAINT_SYSPLL_PCM_FLAG1 0U
  35. #define CONSTRAINT_SYSPLL_RESOURCE_REQ \
  36. (MT_SPM_26M)
  37. static struct mt_spm_cond_tables cond_syspll = {
  38. .name = "syspll",
  39. .table_cg = {
  40. 0x078BF1FC, /* MTCMOS1 */
  41. 0x080D8856, /* INFRA0 */
  42. 0x03AF9A00, /* INFRA1 */
  43. 0x86000640, /* INFRA2 */
  44. 0xC800C000, /* INFRA3 */
  45. 0x00000000, /* INFRA4 */
  46. 0x0000007C, /* INFRA5 */
  47. 0x280E0800, /* MMSYS0 */
  48. 0x00000001, /* MMSYS1 */
  49. 0x00000000, /* MMSYS2 */
  50. },
  51. .table_pll = 0U,
  52. };
  53. static struct mt_spm_cond_tables cond_syspll_res = {
  54. .table_cg = { 0U },
  55. .table_pll = 0U,
  56. };
  57. static struct constraint_status status = {
  58. .id = MT_RM_CONSTRAINT_ID_SYSPLL,
  59. .valid = (MT_SPM_RC_VALID_SW |
  60. MT_SPM_RC_VALID_COND_LATCH |
  61. MT_SPM_RC_VALID_XSOC_BBLPM),
  62. .cond_block = 0U,
  63. .enter_cnt = 0U,
  64. .cond_res = &cond_syspll_res,
  65. };
  66. static void spm_syspll_conduct(struct spm_lp_scen *spm_lp,
  67. unsigned int *resource_req)
  68. {
  69. spm_lp->pwrctrl->pcm_flags = (uint32_t)CONSTRAINT_SYSPLL_PCM_FLAG;
  70. spm_lp->pwrctrl->pcm_flags1 = (uint32_t)CONSTRAINT_SYSPLL_PCM_FLAG1;
  71. *resource_req |= CONSTRAINT_SYSPLL_RESOURCE_REQ;
  72. }
  73. bool spm_is_valid_rc_syspll(unsigned int cpu, int state_id)
  74. {
  75. (void)cpu;
  76. (void)state_id;
  77. return (status.cond_block == 0U) && IS_MT_RM_RC_READY(status.valid);
  78. }
  79. int spm_update_rc_syspll(int state_id, int type, const void *val)
  80. {
  81. const struct mt_spm_cond_tables *tlb;
  82. const struct mt_spm_cond_tables *tlb_check;
  83. int res = MT_RM_STATUS_OK;
  84. if (val == NULL) {
  85. return MT_RM_STATUS_BAD;
  86. }
  87. if (type == PLAT_RC_UPDATE_CONDITION) {
  88. tlb = (const struct mt_spm_cond_tables *)val;
  89. tlb_check = (const struct mt_spm_cond_tables *)&cond_syspll;
  90. status.cond_block =
  91. mt_spm_cond_check(state_id, tlb, tlb_check,
  92. ((status.valid &
  93. MT_SPM_RC_VALID_COND_LATCH) != 0U) ?
  94. &cond_syspll_res : NULL);
  95. } else {
  96. res = MT_RM_STATUS_BAD;
  97. }
  98. return res;
  99. }
  100. unsigned int spm_allow_rc_syspll(int state_id)
  101. {
  102. (void)state_id;
  103. return CONSTRAINT_SYSPLL_ALLOW;
  104. }
  105. int spm_run_rc_syspll(unsigned int cpu, int state_id)
  106. {
  107. unsigned int ext_op = MT_SPM_EX_OP_HW_S1_DETECT;
  108. unsigned int allows = CONSTRAINT_SYSPLL_ALLOW;
  109. (void)cpu;
  110. if (IS_MT_SPM_RC_BBLPM_MODE(status.valid)) {
  111. #ifdef MT_SPM_USING_SRCLKEN_RC
  112. ext_op |= MT_SPM_EX_OP_SRCLKEN_RC_BBLPM;
  113. #else
  114. allows |= MT_RM_CONSTRAINT_ALLOW_BBLPM;
  115. #endif
  116. }
  117. #ifndef ATF_PLAT_SPM_SSPM_NOTIFIER_UNSUPPORT
  118. mt_spm_sspm_notify_u32(MT_SPM_NOTIFY_LP_ENTER, allows |
  119. (IS_PLAT_SUSPEND_ID(state_id) ?
  120. MT_RM_CONSTRAINT_ALLOW_AP_SUSPEND : 0U));
  121. #else
  122. (void)allows;
  123. #endif
  124. if (IS_PLAT_SUSPEND_ID(state_id)) {
  125. mt_spm_suspend_enter(state_id,
  126. (MT_SPM_EX_OP_SET_WDT |
  127. MT_SPM_EX_OP_HW_S1_DETECT |
  128. MT_SPM_EX_OP_SET_SUSPEND_MODE),
  129. CONSTRAINT_SYSPLL_RESOURCE_REQ);
  130. } else {
  131. mt_spm_idle_generic_enter(state_id, ext_op, spm_syspll_conduct);
  132. }
  133. return 0;
  134. }
  135. int spm_reset_rc_syspll(unsigned int cpu, int state_id)
  136. {
  137. unsigned int ext_op = MT_SPM_EX_OP_HW_S1_DETECT;
  138. unsigned int allows = CONSTRAINT_SYSPLL_ALLOW;
  139. (void)cpu;
  140. if (IS_MT_SPM_RC_BBLPM_MODE(status.valid)) {
  141. #ifdef MT_SPM_USING_SRCLKEN_RC
  142. ext_op |= MT_SPM_EX_OP_SRCLKEN_RC_BBLPM;
  143. #else
  144. allows |= MT_RM_CONSTRAINT_ALLOW_BBLPM;
  145. #endif
  146. }
  147. #ifndef ATF_PLAT_SPM_SSPM_NOTIFIER_UNSUPPORT
  148. mt_spm_sspm_notify_u32(MT_SPM_NOTIFY_LP_LEAVE, allows);
  149. #else
  150. (void)allows;
  151. #endif
  152. if (IS_PLAT_SUSPEND_ID(state_id)) {
  153. mt_spm_suspend_resume(state_id,
  154. (MT_SPM_EX_OP_SET_SUSPEND_MODE |
  155. MT_SPM_EX_OP_SET_WDT |
  156. MT_SPM_EX_OP_HW_S1_DETECT),
  157. NULL);
  158. } else {
  159. mt_spm_idle_generic_resume(state_id, ext_op, NULL);
  160. status.enter_cnt++;
  161. }
  162. return 0;
  163. }