mt_spm.h 1.5 KB

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  1. /*
  2. * Copyright (c) 2020, MediaTek Inc. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef MT_SPM_H
  7. #define MT_SPM_H
  8. #include <lib/bakery_lock.h>
  9. #include <lib/spinlock.h>
  10. #include <plat_mtk_lpm.h>
  11. /*
  12. * ARM v8.2, the cache will turn off automatically when cpu
  13. * power down. So, there is no doubt to use the spin_lock here
  14. */
  15. #if !HW_ASSISTED_COHERENCY
  16. #define MT_SPM_USING_BAKERY_LOCK
  17. #endif
  18. #ifdef MT_SPM_USING_BAKERY_LOCK
  19. DECLARE_BAKERY_LOCK(spm_lock);
  20. #define plat_spm_lock() bakery_lock_get(&spm_lock)
  21. #define plat_spm_unlock() bakery_lock_release(&spm_lock)
  22. #else
  23. extern spinlock_t spm_lock;
  24. #define plat_spm_lock() spin_lock(&spm_lock)
  25. #define plat_spm_unlock() spin_unlock(&spm_lock)
  26. #endif
  27. #define MT_SPM_USING_SRCLKEN_RC
  28. /* spm extern operand definition */
  29. #define MT_SPM_EX_OP_CLR_26M_RECORD (1U << 0)
  30. #define MT_SPM_EX_OP_SET_WDT (1U << 1)
  31. #define MT_SPM_EX_OP_NON_GENERIC_RESOURCE_REQ (1U << 2)
  32. #define MT_SPM_EX_OP_SET_SUSPEND_MODE (1U << 3)
  33. #define MT_SPM_EX_OP_SET_IS_ADSP (1U << 4)
  34. #define MT_SPM_EX_OP_SRCLKEN_RC_BBLPM (1U << 5)
  35. #define MT_SPM_EX_OP_HW_S1_DETECT (1U << 6)
  36. typedef enum {
  37. WR_NONE = 0,
  38. WR_UART_BUSY = 1,
  39. WR_ABORT = 2,
  40. WR_PCM_TIMER = 3,
  41. WR_WAKE_SRC = 4,
  42. WR_DVFSRC = 5,
  43. WR_TWAM = 6,
  44. WR_PMSR = 7,
  45. WR_SPM_ACK_CHK = 8,
  46. WR_UNKNOWN = 9,
  47. } wake_reason_t;
  48. static inline void spm_lock_get(void)
  49. {
  50. plat_spm_lock();
  51. }
  52. static inline void spm_lock_release(void)
  53. {
  54. plat_spm_unlock();
  55. }
  56. extern void spm_boot_init(void);
  57. #endif /* MT_SPM_H */