plat_sip_calls.c 1.5 KB

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  1. /*
  2. * Copyright (c) 2020-2023, MediaTek Inc. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <common/debug.h>
  7. #include <common/runtime_svc.h>
  8. #include <emi_mpu.h>
  9. #include <mt_dp.h>
  10. #include <mt_spm.h>
  11. #include <mt_spm_vcorefs.h>
  12. #include <mtk_apusys.h>
  13. #include <mtk_sip_svc.h>
  14. #include <plat_dfd.h>
  15. #include "plat_sip_calls.h"
  16. uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid,
  17. u_register_t x1,
  18. u_register_t x2,
  19. u_register_t x3,
  20. u_register_t x4,
  21. void *cookie,
  22. void *handle,
  23. u_register_t flags)
  24. {
  25. int32_t ret;
  26. uint32_t ret_val;
  27. switch (smc_fid) {
  28. case MTK_SIP_TEE_MPU_PERM_SET_AARCH64:
  29. case MTK_SIP_TEE_MPU_PERM_SET_AARCH32:
  30. ret = emi_mpu_sip_handler(x1, x2, x3);
  31. SMC_RET2(handle, ret, ret_val);
  32. break;
  33. case MTK_SIP_DP_CONTROL_AARCH32:
  34. case MTK_SIP_DP_CONTROL_AARCH64:
  35. ret = dp_secure_handler(x1, x2, &ret_val);
  36. SMC_RET2(handle, ret, ret_val);
  37. break;
  38. case MTK_SIP_VCORE_CONTROL_AARCH32:
  39. case MTK_SIP_VCORE_CONTROL_AARCH64:
  40. ret = spm_vcorefs_v2_args(x1, x2, x3, &x4);
  41. SMC_RET2(handle, ret, x4);
  42. break;
  43. case MTK_SIP_KERNEL_DFD_AARCH32:
  44. case MTK_SIP_KERNEL_DFD_AARCH64:
  45. ret = dfd_smc_dispatcher(x1, x2, x3, x4);
  46. SMC_RET1(handle, ret);
  47. break;
  48. case MTK_SIP_APUSYS_CONTROL_AARCH32:
  49. case MTK_SIP_APUSYS_CONTROL_AARCH64:
  50. ret = apusys_kernel_ctrl(x1, x2, x3, x4, &ret_val);
  51. SMC_RET2(handle, ret, ret_val);
  52. break;
  53. default:
  54. ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
  55. break;
  56. }
  57. SMC_RET1(handle, SMC_UNK);
  58. }