mhu_v2_x.h 5.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210
  1. /*
  2. * Copyright (c) 2020-2022, Arm Limited. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef MHU_V2_X_H
  7. #define MHU_V2_X_H
  8. #include <stdbool.h>
  9. #include <stdint.h>
  10. #define MHU_2_X_INTR_NR2R_OFF (0x0u)
  11. #define MHU_2_X_INTR_R2NR_OFF (0x1u)
  12. #define MHU_2_1_INTR_CHCOMB_OFF (0x2u)
  13. #define MHU_2_X_INTR_NR2R_MASK (0x1u << MHU_2_X_INTR_NR2R_OFF)
  14. #define MHU_2_X_INTR_R2NR_MASK (0x1u << MHU_2_X_INTR_R2NR_OFF)
  15. #define MHU_2_1_INTR_CHCOMB_MASK (0x1u << MHU_2_1_INTR_CHCOMB_OFF)
  16. enum mhu_v2_x_frame_t {
  17. MHU_V2_X_SENDER_FRAME = 0x0u,
  18. MHU_V2_X_RECEIVER_FRAME = 0x1u,
  19. };
  20. enum mhu_v2_x_supported_revisions {
  21. MHU_REV_READ_FROM_HW = 0,
  22. MHU_REV_2_0,
  23. MHU_REV_2_1,
  24. };
  25. struct mhu_v2_x_dev_t {
  26. uintptr_t base;
  27. enum mhu_v2_x_frame_t frame;
  28. uint32_t subversion; /*!< Hardware subversion: v2.X */
  29. bool is_initialized; /*!< Indicates if the MHU driver
  30. * is initialized and enabled
  31. */
  32. };
  33. /**
  34. * MHU v2 error enumeration types.
  35. */
  36. enum mhu_v2_x_error_t {
  37. MHU_V_2_X_ERR_NONE = 0,
  38. MHU_V_2_X_ERR_NOT_INIT = -1,
  39. MHU_V_2_X_ERR_ALREADY_INIT = -2,
  40. MHU_V_2_X_ERR_UNSUPPORTED_VERSION = -3,
  41. MHU_V_2_X_ERR_INVALID_ARG = -4,
  42. MHU_V_2_X_ERR_GENERAL = -5
  43. };
  44. /**
  45. * Initializes the driver.
  46. *
  47. * dev MHU device struct mhu_v2_x_dev_t.
  48. * rev MHU revision (if can't be identified from HW).
  49. *
  50. * Reads the MHU hardware version.
  51. *
  52. * Returns mhu_v2_x_error_t error code.
  53. *
  54. * MHU revision only has to be specified when versions can't be read
  55. * from HW (ARCH_MAJOR_REV reg reads as 0x0).
  56. *
  57. * This function doesn't check if dev is NULL.
  58. */
  59. enum mhu_v2_x_error_t mhu_v2_x_driver_init(struct mhu_v2_x_dev_t *dev,
  60. enum mhu_v2_x_supported_revisions rev);
  61. /**
  62. * Returns the number of channels implemented.
  63. *
  64. * dev MHU device struct mhu_v2_x_dev_t.
  65. *
  66. * This function doesn't check if dev is NULL.
  67. */
  68. uint32_t mhu_v2_x_get_num_channel_implemented(
  69. const struct mhu_v2_x_dev_t *dev);
  70. /**
  71. * Sends the value over a channel.
  72. *
  73. * dev MHU device struct mhu_v2_x_dev_t.
  74. * channel Channel to send the value over.
  75. * val Value to send.
  76. *
  77. * Sends the value over a channel.
  78. *
  79. * Returns mhu_v2_x_error_t error code.
  80. *
  81. * This function doesn't check if dev is NULL.
  82. * This function doesn't check if channel is implemented.
  83. */
  84. enum mhu_v2_x_error_t mhu_v2_x_channel_send(const struct mhu_v2_x_dev_t *dev,
  85. uint32_t channel, uint32_t val);
  86. /**
  87. * Polls sender channel status.
  88. *
  89. * dev MHU device struct mhu_v2_x_dev_t.
  90. * channel Channel to poll the status of.
  91. * value Pointer to variable that will store the value.
  92. *
  93. * Polls sender channel status.
  94. *
  95. * Returns mhu_v2_x_error_t error code.
  96. *
  97. * This function doesn't check if dev is NULL.
  98. * This function doesn't check if channel is implemented.
  99. */
  100. enum mhu_v2_x_error_t mhu_v2_x_channel_poll(const struct mhu_v2_x_dev_t *dev,
  101. uint32_t channel, uint32_t *value);
  102. /**
  103. * Clears the channel after the value is send over it.
  104. *
  105. * dev MHU device struct mhu_v2_x_dev_t.
  106. * channel Channel to clear.
  107. *
  108. * Clears the channel after the value is send over it.
  109. *
  110. * Returns mhu_v2_x_error_t error code..
  111. *
  112. * This function doesn't check if dev is NULL.
  113. * This function doesn't check if channel is implemented.
  114. */
  115. enum mhu_v2_x_error_t mhu_v2_x_channel_clear(const struct mhu_v2_x_dev_t *dev,
  116. uint32_t channel);
  117. /**
  118. * Receives the value over a channel.
  119. *
  120. * dev MHU device struct mhu_v2_x_dev_t.
  121. * channel Channel to receive the value from.
  122. * value Pointer to variable that will store the value.
  123. *
  124. * Receives the value over a channel.
  125. *
  126. * Returns mhu_v2_x_error_t error code.
  127. *
  128. * This function doesn't check if dev is NULL.
  129. * This function doesn't check if channel is implemented.
  130. */
  131. enum mhu_v2_x_error_t mhu_v2_x_channel_receive(
  132. const struct mhu_v2_x_dev_t *dev, uint32_t channel, uint32_t *value);
  133. /**
  134. * Sets bits in the Channel Mask.
  135. *
  136. * dev MHU device struct mhu_v2_x_dev_t.
  137. * channel Which channel's mask to set.
  138. * mask Mask to be set over a receiver frame.
  139. *
  140. * Sets bits in the Channel Mask.
  141. *
  142. * Returns mhu_v2_x_error_t error code..
  143. *
  144. * This function doesn't check if dev is NULL.
  145. * This function doesn't check if channel is implemented.
  146. */
  147. enum mhu_v2_x_error_t mhu_v2_x_channel_mask_set(
  148. const struct mhu_v2_x_dev_t *dev, uint32_t channel, uint32_t mask);
  149. /**
  150. * Clears bits in the Channel Mask.
  151. *
  152. * dev MHU device struct mhu_v2_x_dev_t.
  153. * channel Which channel's mask to clear.
  154. * mask Mask to be clear over a receiver frame.
  155. *
  156. * Clears bits in the Channel Mask.
  157. *
  158. * Returns mhu_v2_x_error_t error code.
  159. *
  160. * This function doesn't check if dev is NULL.
  161. * This function doesn't check if channel is implemented.
  162. */
  163. enum mhu_v2_x_error_t mhu_v2_x_channel_mask_clear(
  164. const struct mhu_v2_x_dev_t *dev, uint32_t channel, uint32_t mask);
  165. /**
  166. * Initiates a MHU transfer with the handshake signals.
  167. *
  168. * dev MHU device struct mhu_v2_x_dev_t.
  169. *
  170. * Initiates a MHU transfer with the handshake signals in a blocking mode.
  171. *
  172. * Returns mhu_v2_x_error_t error code.
  173. *
  174. * This function doesn't check if dev is NULL.
  175. */
  176. enum mhu_v2_x_error_t mhu_v2_x_initiate_transfer(
  177. const struct mhu_v2_x_dev_t *dev);
  178. /**
  179. * Closes a MHU transfer with the handshake signals.
  180. *
  181. * dev MHU device struct mhu_v2_x_dev_t.
  182. *
  183. * Closes a MHU transfer with the handshake signals in a blocking mode.
  184. *
  185. * Returns mhu_v2_x_error_t error code.
  186. *
  187. * This function doesn't check if dev is NULL.
  188. */
  189. enum mhu_v2_x_error_t mhu_v2_x_close_transfer(
  190. const struct mhu_v2_x_dev_t *dev);
  191. #endif /* MHU_V2_X_H */