cortex_a32.h 692 B

12345678910111213141516171819202122
  1. /*
  2. * Copyright (c) 2016-2019, Arm Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef CORTEX_A32_H
  7. #define CORTEX_A32_H
  8. #include <lib/utils_def.h>
  9. /* Cortex-A32 Main ID register for revision 0 */
  10. #define CORTEX_A32_MIDR U(0x410FD010)
  11. /*******************************************************************************
  12. * CPU Extended Control register specific definitions.
  13. * CPUECTLR_EL1 is an implementation-specific register.
  14. ******************************************************************************/
  15. #define CORTEX_A32_CPUECTLR_EL1 p15, 1, c15
  16. #define CORTEX_A32_CPUECTLR_SMPEN_BIT (ULL(1) << 6)
  17. #endif /* CORTEX_A32_H */