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cpus
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aarch64
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denver.h

denver.h 1.5 KB
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  1. /*
    2. 

  2.  * Copyright (c) 2015-2018, Arm Limited and Contributors. All rights reserved.
    3. 

  3.  *
    4. 

  4.  * SPDX-License-Identifier: BSD-3-Clause
    5. 

  5.  */
    6. 

  6. 

  7. #ifndef DENVER_H
    8. 

  8. #define DENVER_H
    9. 

  9. 

  10. /* MIDR values for Denver */
    11. 

  11. #define DENVER_MIDR_PN0			U(0x4E0F0000)
    12. 

  12. #define DENVER_MIDR_PN1			U(0x4E0F0010)
    13. 

  13. #define DENVER_MIDR_PN2			U(0x4E0F0020)
    14. 

  14. #define DENVER_MIDR_PN3			U(0x4E0F0030)
    15. 

  15. #define DENVER_MIDR_PN4			U(0x4E0F0040)
    16. 

  16. #define DENVER_MIDR_PN5			U(0x4E0F0050)
    17. 

  17. #define DENVER_MIDR_PN6			U(0x4E0F0060)
    18. 

  18. #define DENVER_MIDR_PN7			U(0x4E0F0070)
    19. 

  19. #define DENVER_MIDR_PN8			U(0x4E0F0080)
    20. 

  20. #define DENVER_MIDR_PN9			U(0x4E0F0090)
    21. 

  21. 

  22. /* Implementer code in the MIDR register */
    23. 

  23. #define DENVER_IMPL			U(0x4E)
    24. 

  24. 

  25. /* CPU state ids - implementation defined */
    26. 

  26. #define DENVER_CPU_STATE_POWER_DOWN	U(0x3)
    27. 

  27. 

  28. /* Speculative store buffering */
    29. 

  29. #define DENVER_CPU_DIS_SSB_EL3		(U(1) << 11)
    30. 

  30. #define DENVER_PN4_CPU_DIS_SSB_EL3	(U(1) << 18)
    31. 

  31. 

  32. /* Speculative memory disambiguation */
    33. 

  33. #define DENVER_CPU_DIS_MD_EL3		(U(1) << 9)
    34. 

  34. #define DENVER_PN4_CPU_DIS_MD_EL3	(U(1) << 17)
    35. 

  35. 

  36. /* Core power management states */
    37. 

  37. #define DENVER_CPU_PMSTATE_C1		U(0x1)
    38. 

  38. #define DENVER_CPU_PMSTATE_C6		U(0x6)
    39. 

  39. #define DENVER_CPU_PMSTATE_C7		U(0x7)
    40. 

  40. #define DENVER_CPU_PMSTATE_MASK		U(0xF)
    41. 

  41. 

  42. /* ACTRL_ELx bits to enable dual execution*/
    43. 

  43. #define DENVER_CPU_ENABLE_DUAL_EXEC_EL2 (ULL(1) << 9)
    44. 

  44. #define DENVER_CPU_ENABLE_DUAL_EXEC_EL3 (ULL(1) << 9)
    45. 

  45. #define DENVER_CPU_ENABLE_DUAL_EXEC_EL1 (U(1) << 4)
    46. 

  46. 

  47. #ifndef __ASSEMBLER__
    48. 

  48. 

  49. /* Disable Dynamic Code Optimisation */
    50. 

  50. void denver_disable_dco(void);
    51. 

  51. 

  52. #endif /* __ASSEMBLER__ */
    53. 

  53. 

  54. #endif /* DENVER_H */
    55.