platform_t186.mk 2.2 KB

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  1. #
  2. # Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
  3. # Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
  4. #
  5. # SPDX-License-Identifier: BSD-3-Clause
  6. #
  7. # platform configs
  8. ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS := 1
  9. $(eval $(call add_define,ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS))
  10. ENABLE_CHIP_VERIFICATION_HARNESS := 0
  11. $(eval $(call add_define,ENABLE_CHIP_VERIFICATION_HARNESS))
  12. RESET_TO_BL31 := 1
  13. PROGRAMMABLE_RESET_ADDRESS := 0
  14. COLD_BOOT_SINGLE_CPU := 1
  15. RELOCATE_BL32_IMAGE := 1
  16. # platform settings
  17. TZDRAM_BASE := 0x30000000
  18. $(eval $(call add_define,TZDRAM_BASE))
  19. PLATFORM_CLUSTER_COUNT := 2
  20. $(eval $(call add_define,PLATFORM_CLUSTER_COUNT))
  21. PLATFORM_MAX_CPUS_PER_CLUSTER := 4
  22. $(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))
  23. MAX_XLAT_TABLES := 25
  24. $(eval $(call add_define,MAX_XLAT_TABLES))
  25. MAX_MMAP_REGIONS := 30
  26. $(eval $(call add_define,MAX_MMAP_REGIONS))
  27. # platform files
  28. PLAT_INCLUDES += -Iplat/nvidia/tegra/include/t186 \
  29. -I${SOC_DIR}/drivers/include
  30. BL31_SOURCES += ${TEGRA_GICv2_SOURCES} \
  31. drivers/ti/uart/aarch64/16550_console.S \
  32. lib/cpus/aarch64/denver.S \
  33. lib/cpus/aarch64/cortex_a57.S \
  34. ${TEGRA_DRIVERS}/bpmp_ipc/intf.c \
  35. ${TEGRA_DRIVERS}/bpmp_ipc/ivc.c \
  36. ${TEGRA_DRIVERS}/gpcdma/gpcdma.c \
  37. ${TEGRA_DRIVERS}/memctrl/memctrl_v2.c \
  38. ${TEGRA_DRIVERS}/smmu/smmu.c \
  39. ${SOC_DIR}/drivers/mce/mce.c \
  40. ${SOC_DIR}/drivers/mce/ari.c \
  41. ${SOC_DIR}/drivers/mce/nvg.c \
  42. ${SOC_DIR}/drivers/mce/aarch64/nvg_helpers.S \
  43. $(SOC_DIR)/drivers/se/se.c \
  44. ${SOC_DIR}/plat_memctrl.c \
  45. ${SOC_DIR}/plat_psci_handlers.c \
  46. ${SOC_DIR}/plat_setup.c \
  47. ${SOC_DIR}/plat_secondary.c \
  48. ${SOC_DIR}/plat_sip_calls.c \
  49. ${SOC_DIR}/plat_smmu.c \
  50. ${SOC_DIR}/plat_trampoline.S
  51. # Enable workarounds for selected Cortex-A57 erratas.
  52. A57_DISABLE_NON_TEMPORAL_HINT := 1
  53. ERRATA_A57_806969 := 1
  54. ERRATA_A57_813419 := 1
  55. ERRATA_A57_813420 := 1
  56. ERRATA_A57_826974 := 1
  57. ERRATA_A57_826977 := 1
  58. ERRATA_A57_828024 := 1
  59. ERRATA_A57_829520 := 1
  60. ERRATA_A57_833471 := 1
  61. # Enable higher performance Non-cacheable load forwarding
  62. A57_ENABLE_NONCACHEABLE_LOAD_FWD := 1