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- #include <platform_def.h>
- #include <common/bl_common.h>
- #include <common/interrupt_props.h>
- #include <drivers/arm/gicv3.h>
- #include <lib/utils.h>
- #include <plat/common/platform.h>
- #pragma weak plat_rockchip_gic_driver_init
- #pragma weak plat_rockchip_gic_init
- #pragma weak plat_rockchip_gic_cpuif_enable
- #pragma weak plat_rockchip_gic_cpuif_disable
- #pragma weak plat_rockchip_gic_pcpu_init
- uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT];
- static const interrupt_prop_t g01s_interrupt_props[] = {
- PLAT_RK_GICV3_G0_IRQS,
- PLAT_RK_GICV3_G1S_IRQS
- };
- static unsigned int plat_rockchip_mpidr_to_core_pos(unsigned long mpidr)
- {
- return (unsigned int)plat_core_pos_by_mpidr(mpidr);
- }
- const gicv3_driver_data_t rockchip_gic_data = {
- .gicd_base = PLAT_RK_GICD_BASE,
- .gicr_base = PLAT_RK_GICR_BASE,
- .interrupt_props = g01s_interrupt_props,
- .interrupt_props_num = ARRAY_SIZE(g01s_interrupt_props),
- .rdistif_num = PLATFORM_CORE_COUNT,
- .rdistif_base_addrs = rdistif_base_addrs,
- .mpidr_to_core_pos = plat_rockchip_mpidr_to_core_pos,
- };
- void plat_rockchip_gic_driver_init(void)
- {
-
- #ifdef IMAGE_BL31
- gicv3_driver_init(&rockchip_gic_data);
- #endif
- }
- void plat_rockchip_gic_init(void)
- {
- gicv3_distif_init();
- gicv3_rdistif_init(plat_my_core_pos());
- gicv3_cpuif_enable(plat_my_core_pos());
- }
- void plat_rockchip_gic_cpuif_enable(void)
- {
- gicv3_cpuif_enable(plat_my_core_pos());
- }
- void plat_rockchip_gic_cpuif_disable(void)
- {
- gicv3_cpuif_disable(plat_my_core_pos());
- }
- void plat_rockchip_gic_pcpu_init(void)
- {
- gicv3_rdistif_init(plat_my_core_pos());
- }
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