sd_mmc.c 42 KB

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  1. /*
  2. * Copyright 2021 NXP
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. *
  7. */
  8. #include <endian.h>
  9. #include <stdio.h>
  10. #include <stdlib.h>
  11. #include <string.h>
  12. #include <arch_helpers.h>
  13. #include <common/debug.h>
  14. #include <drivers/io/io_block.h>
  15. #include "nxp_timer.h"
  16. #include "sd_mmc.h"
  17. #include <utils.h>
  18. #include <utils_def.h>
  19. /* Private structure for MMC driver data */
  20. static struct mmc mmc_drv_data;
  21. #ifndef NXP_POLICY_OTA
  22. /*
  23. * For NXP_POLICY_OTA, SD needs to do R/W on OCRAM. OCRAM is secure memory at
  24. * default. SD can only do non-secure DMA. Configuring SD to work in PIO mode
  25. * instead of DMA mode will make SD R/W on OCRAM available.
  26. */
  27. /* To debug without dma comment this MACRO */
  28. #define NXP_SD_DMA_CAPABILITY
  29. #endif
  30. #define SD_TIMEOUT 1000 /* ms */
  31. #define SD_TIMEOUT_HIGH 20000 /* ms */
  32. #define SD_BLOCK_TIMEOUT 8 /* ms */
  33. #define ERROR_ESDHC_CARD_DETECT_FAIL -1
  34. #define ERROR_ESDHC_UNUSABLE_CARD -2
  35. #define ERROR_ESDHC_COMMUNICATION_ERROR -3
  36. #define ERROR_ESDHC_BLOCK_LENGTH -4
  37. #define ERROR_ESDHC_DMA_ERROR -5
  38. #define ERROR_ESDHC_BUSY -6
  39. /***************************************************************
  40. * Function : set_speed
  41. * Arguments : mmc - Pointer to mmc struct
  42. * clock - Clock Value to be set
  43. * Return : void
  44. * Description : Calculates the value of SDCLKFS and DVS to be set
  45. * for getting the required clock assuming the base_clk
  46. * as a fixed value (MAX_PLATFORM_CLOCK)
  47. *****************************************************************/
  48. static void set_speed(struct mmc *mmc, uint32_t clock)
  49. {
  50. /* sdhc_clk = (base clock) / [(SDCLKFS × 2) × (DVS +1)] */
  51. uint32_t dvs = 1U;
  52. uint32_t sdclkfs = 2U;
  53. /* TBD - Change this to actual platform clock by reading via RCW */
  54. uint32_t base_clk = MAX_PLATFORM_CLOCK;
  55. if (base_clk / 16 > clock) {
  56. for (sdclkfs = 2U; sdclkfs < 256U; sdclkfs *= 2U) {
  57. if ((base_clk / sdclkfs) <= (clock * 16)) {
  58. break;
  59. }
  60. }
  61. }
  62. for (dvs = 1U; dvs <= 16U; dvs++) {
  63. if ((base_clk / (dvs * sdclkfs)) <= clock) {
  64. break;
  65. }
  66. }
  67. sdclkfs >>= 1U;
  68. dvs -= 1U;
  69. esdhc_out32(&mmc->esdhc_regs->sysctl,
  70. (ESDHC_SYSCTL_DTOCV(TIMEOUT_COUNTER_SDCLK_2_27) |
  71. ESDHC_SYSCTL_SDCLKFS(sdclkfs) | ESDHC_SYSCTL_DVS(dvs) |
  72. ESDHC_SYSCTL_SDCLKEN));
  73. }
  74. /***************************************************************************
  75. * Function : esdhc_init
  76. * Arguments : mmc - Pointer to mmc struct
  77. * card_detect - flag to indicate if card insert needs
  78. * to be detected or not. For SDHC2 controller, Card detect
  79. * is not present, so this field will be false
  80. * Return : SUCCESS or Error Code
  81. * Description : 1. Set Initial Clock Speed
  82. * 2. Card Detect if not eMMC
  83. * 3. Enable Controller Clock
  84. * 4. Send 80 ticks for card to power up
  85. * 5. Set LE mode and Bus Width as 1 bit.
  86. ***************************************************************************/
  87. static int esdhc_init(struct mmc *mmc, bool card_detect)
  88. {
  89. uint32_t val;
  90. uint64_t start_time;
  91. /* Reset the entire host controller */
  92. val = esdhc_in32(&mmc->esdhc_regs->sysctl) | ESDHC_SYSCTL_RSTA;
  93. esdhc_out32(&mmc->esdhc_regs->sysctl, val);
  94. /* Wait until the controller is available */
  95. start_time = get_timer_val(0);
  96. while (get_timer_val(start_time) < SD_TIMEOUT_HIGH) {
  97. val = esdhc_in32(&mmc->esdhc_regs->sysctl) & ESDHC_SYSCTL_RSTA;
  98. if (val == 0U) {
  99. break;
  100. }
  101. }
  102. val = esdhc_in32(&mmc->esdhc_regs->sysctl) &
  103. (ESDHC_SYSCTL_RSTA);
  104. if (val != 0U) {
  105. ERROR("SD Reset failed\n");
  106. return ERROR_ESDHC_BUSY;
  107. }
  108. /* Set initial clock speed */
  109. set_speed(mmc, CARD_IDENTIFICATION_FREQ);
  110. if (card_detect) {
  111. /* Check CINS in prsstat register */
  112. val = esdhc_in32(&mmc->esdhc_regs->prsstat) &
  113. ESDHC_PRSSTAT_CINS;
  114. if (val == 0) {
  115. ERROR("CINS not set in prsstat\n");
  116. return ERROR_ESDHC_CARD_DETECT_FAIL;
  117. }
  118. }
  119. /* Enable controller clock */
  120. val = esdhc_in32(&mmc->esdhc_regs->sysctl) | ESDHC_SYSCTL_SDCLKEN;
  121. esdhc_out32(&mmc->esdhc_regs->sysctl, val);
  122. /* Send 80 clock ticks for the card to power up */
  123. val = esdhc_in32(&mmc->esdhc_regs->sysctl) | ESDHC_SYSCTL_INITA;
  124. esdhc_out32(&mmc->esdhc_regs->sysctl, val);
  125. start_time = get_timer_val(0);
  126. while (get_timer_val(start_time) < SD_TIMEOUT) {
  127. val = esdhc_in32(&mmc->esdhc_regs->sysctl) & ESDHC_SYSCTL_INITA;
  128. if (val != 0U) {
  129. break;
  130. }
  131. }
  132. val = esdhc_in32(&mmc->esdhc_regs->sysctl) & ESDHC_SYSCTL_INITA;
  133. if (val == 0U) {
  134. ERROR("Failed to power up the card\n");
  135. return ERROR_ESDHC_CARD_DETECT_FAIL;
  136. }
  137. INFO("Card detected successfully\n");
  138. val = esdhc_in32(&mmc->esdhc_regs->proctl);
  139. val = val | (ESDHC_PROCTL_EMODE_LE | ESDHC_PROCTL_DTW_1BIT);
  140. /* Set little endian mode, set bus width as 1-bit */
  141. esdhc_out32(&mmc->esdhc_regs->proctl, val);
  142. /* Enable cache snooping for DMA transactions */
  143. val = esdhc_in32(&mmc->esdhc_regs->ctl) | ESDHC_DCR_SNOOP;
  144. esdhc_out32(&mmc->esdhc_regs->ctl, val);
  145. return 0;
  146. }
  147. /***************************************************************************
  148. * Function : esdhc_send_cmd
  149. * Arguments : mmc - Pointer to mmc struct
  150. * cmd - Command Number
  151. * args - Command Args
  152. * Return : SUCCESS is 0, or Error Code ( < 0)
  153. * Description : Updates the eSDHC registers cmdargs and xfertype
  154. ***************************************************************************/
  155. static int esdhc_send_cmd(struct mmc *mmc, uint32_t cmd, uint32_t args)
  156. {
  157. uint32_t val;
  158. uint64_t start_time;
  159. uint32_t xfertyp = 0;
  160. esdhc_out32(&mmc->esdhc_regs->irqstat, ESDHC_IRQSTAT_CLEAR_ALL);
  161. /* Wait for the command line & data line to be free */
  162. /* (poll the CIHB,CDIHB bit of the present state register) */
  163. start_time = get_timer_val(0);
  164. while (get_timer_val(start_time) < SD_TIMEOUT_HIGH) {
  165. val = esdhc_in32(&mmc->esdhc_regs->prsstat) &
  166. (ESDHC_PRSSTAT_CIHB | ESDHC_PRSSTAT_CDIHB);
  167. if (val == 0U) {
  168. break;
  169. }
  170. }
  171. val = esdhc_in32(&mmc->esdhc_regs->prsstat) &
  172. (ESDHC_PRSSTAT_CIHB | ESDHC_PRSSTAT_CDIHB);
  173. if (val != 0U) {
  174. ERROR("SD send cmd: Command Line or Data Line Busy cmd = %x\n",
  175. cmd);
  176. return ERROR_ESDHC_BUSY;
  177. }
  178. if (cmd == CMD2 || cmd == CMD9) {
  179. xfertyp |= ESDHC_XFERTYP_RSPTYP_136;
  180. } else if (cmd == CMD7 || (cmd == CMD6 && mmc->card.type == MMC_CARD)) {
  181. xfertyp |= ESDHC_XFERTYP_RSPTYP_48_BUSY;
  182. } else if (cmd != CMD0) {
  183. xfertyp |= ESDHC_XFERTYP_RSPTYP_48;
  184. }
  185. if (cmd == CMD2 || cmd == CMD9) {
  186. xfertyp |= ESDHC_XFERTYP_CCCEN; /* Command index check enable */
  187. } else if ((cmd != CMD0) && (cmd != ACMD41) && (cmd != CMD1)) {
  188. xfertyp = xfertyp | ESDHC_XFERTYP_CCCEN | ESDHC_XFERTYP_CICEN;
  189. }
  190. if ((cmd == CMD8 || cmd == CMD14 || cmd == CMD19) &&
  191. mmc->card.type == MMC_CARD) {
  192. xfertyp |= ESDHC_XFERTYP_DPSEL;
  193. if (cmd != CMD19) {
  194. xfertyp |= ESDHC_XFERTYP_DTDSEL;
  195. }
  196. }
  197. if (cmd == CMD6 || cmd == CMD17 || cmd == CMD18 || cmd == CMD24 ||
  198. cmd == ACMD51) {
  199. if (!(mmc->card.type == MMC_CARD && cmd == CMD6)) {
  200. if (cmd == CMD24) {
  201. xfertyp |= ESDHC_XFERTYP_DPSEL;
  202. } else {
  203. xfertyp |= (ESDHC_XFERTYP_DPSEL |
  204. ESDHC_XFERTYP_DTDSEL);
  205. }
  206. }
  207. if (cmd == CMD18) {
  208. xfertyp |= ESDHC_XFERTYP_BCEN;
  209. if (mmc->dma_support != 0) {
  210. /* Set BCEN of XFERTYP */
  211. xfertyp |= ESDHC_XFERTYP_DMAEN;
  212. }
  213. }
  214. if ((cmd == CMD17 || cmd == CMD24) && (mmc->dma_support != 0)) {
  215. xfertyp |= ESDHC_XFERTYP_DMAEN;
  216. }
  217. }
  218. xfertyp |= ((cmd & 0x3F) << 24);
  219. esdhc_out32(&mmc->esdhc_regs->cmdarg, args);
  220. esdhc_out32(&mmc->esdhc_regs->xfertyp, xfertyp);
  221. #ifdef NXP_SD_DEBUG
  222. INFO("cmd = %d\n", cmd);
  223. INFO("args = %x\n", args);
  224. INFO("xfertyp: = %x\n", xfertyp);
  225. #endif
  226. return 0;
  227. }
  228. /***************************************************************************
  229. * Function : esdhc_wait_response
  230. * Arguments : mmc - Pointer to mmc struct
  231. * response - Value updated
  232. * Return : SUCCESS - Response Received
  233. * COMMUNICATION_ERROR - Command not Complete
  234. * COMMAND_ERROR - CIE, CCE or CEBE error
  235. * RESP_TIMEOUT - CTOE error
  236. * Description : Checks for successful command completion.
  237. * Clears the CC bit at the end.
  238. ***************************************************************************/
  239. static int esdhc_wait_response(struct mmc *mmc, uint32_t *response)
  240. {
  241. uint32_t val;
  242. uint64_t start_time;
  243. uint32_t status = 0U;
  244. /* Wait for the command to complete */
  245. start_time = get_timer_val(0);
  246. while (get_timer_val(start_time) < SD_TIMEOUT_HIGH) {
  247. val = esdhc_in32(&mmc->esdhc_regs->irqstat) & ESDHC_IRQSTAT_CC;
  248. if (val != 0U) {
  249. break;
  250. }
  251. }
  252. val = esdhc_in32(&mmc->esdhc_regs->irqstat) & ESDHC_IRQSTAT_CC;
  253. if (val == 0U) {
  254. ERROR("%s:IRQSTAT Cmd not complete(CC not set)\n", __func__);
  255. return ERROR_ESDHC_COMMUNICATION_ERROR;
  256. }
  257. status = esdhc_in32(&mmc->esdhc_regs->irqstat);
  258. /* Check whether the interrupt is a CRC, CTOE or CIE error */
  259. if ((status & (ESDHC_IRQSTAT_CIE | ESDHC_IRQSTAT_CEBE |
  260. ESDHC_IRQSTAT_CCE)) != 0) {
  261. ERROR("%s: IRQSTAT CRC, CEBE or CIE error = %x\n",
  262. __func__, status);
  263. return COMMAND_ERROR;
  264. }
  265. if ((status & ESDHC_IRQSTAT_CTOE) != 0) {
  266. INFO("%s: IRQSTAT CTOE set = %x\n", __func__, status);
  267. return RESP_TIMEOUT;
  268. }
  269. if ((status & ESDHC_IRQSTAT_DMAE) != 0) {
  270. ERROR("%s: IRQSTAT DMAE set = %x\n", __func__, status);
  271. return ERROR_ESDHC_DMA_ERROR;
  272. }
  273. if (response != NULL) {
  274. /* Get response values from eSDHC CMDRSPx registers. */
  275. response[0] = esdhc_in32(&mmc->esdhc_regs->cmdrsp[0]);
  276. response[1] = esdhc_in32(&mmc->esdhc_regs->cmdrsp[1]);
  277. response[2] = esdhc_in32(&mmc->esdhc_regs->cmdrsp[2]);
  278. response[3] = esdhc_in32(&mmc->esdhc_regs->cmdrsp[3]);
  279. #ifdef NXP_SD_DEBUG
  280. INFO("Resp R1 R2 R3 R4\n");
  281. INFO("Resp R1 = %x\n", response[0]);
  282. INFO("R2 = %x\n", response[1]);
  283. INFO("R3 = %x\n", response[2]);
  284. INFO("R4 = %x\n", response[3]);
  285. INFO("\n");
  286. #endif
  287. }
  288. /* Clear the CC bit - w1c */
  289. val = esdhc_in32(&mmc->esdhc_regs->irqstat) | ESDHC_IRQSTAT_CC;
  290. esdhc_out32(&mmc->esdhc_regs->irqstat, val);
  291. return 0;
  292. }
  293. /***************************************************************************
  294. * Function : mmc_switch_to_high_frquency
  295. * Arguments : mmc - Pointer to mmc struct
  296. * Return : SUCCESS or Error Code
  297. * Description : mmc card below ver 4.0 does not support high speed
  298. * freq = 20 MHz
  299. * Send CMD6 (CMD_SWITCH_FUNC) With args 0x03B90100
  300. * Send CMD13 (CMD_SEND_STATUS)
  301. * if SWITCH Error, freq = 26 MHz
  302. * if no error, freq = 52 MHz
  303. ***************************************************************************/
  304. static int mmc_switch_to_high_frquency(struct mmc *mmc)
  305. {
  306. int error;
  307. uint32_t response[4];
  308. uint64_t start_time;
  309. mmc->card.bus_freq = MMC_SS_20MHZ;
  310. /* mmc card below ver 4.0 does not support high speed */
  311. if (mmc->card.version < MMC_CARD_VERSION_4_X) {
  312. return 0;
  313. }
  314. /* send switch cmd to change the card to High speed */
  315. error = esdhc_send_cmd(mmc, CMD_SWITCH_FUNC, SET_EXT_CSD_HS_TIMING);
  316. if (error != 0) {
  317. return error;
  318. }
  319. error = esdhc_wait_response(mmc, response);
  320. if (error != 0) {
  321. return error;
  322. }
  323. start_time = get_timer_val(0);
  324. do {
  325. /* check the status for which error */
  326. error = esdhc_send_cmd(mmc,
  327. CMD_SEND_STATUS, mmc->card.rca << 16);
  328. if (error != 0) {
  329. return error;
  330. }
  331. error = esdhc_wait_response(mmc, response);
  332. if (error != 0) {
  333. return error;
  334. }
  335. } while (((response[0] & SWITCH_ERROR) != 0) &&
  336. (get_timer_val(start_time) < SD_TIMEOUT));
  337. /* Check for the present state of card */
  338. if ((response[0] & SWITCH_ERROR) != 0) {
  339. mmc->card.bus_freq = MMC_HS_26MHZ;
  340. } else {
  341. mmc->card.bus_freq = MMC_HS_52MHZ;
  342. }
  343. return 0;
  344. }
  345. /***************************************************************************
  346. * Function : esdhc_set_data_attributes
  347. * Arguments : mmc - Pointer to mmc struct
  348. * blkcnt
  349. * blklen
  350. * Return : SUCCESS or Error Code
  351. * Description : Set block attributes and watermark level register
  352. ***************************************************************************/
  353. static int esdhc_set_data_attributes(struct mmc *mmc, uint32_t *dest_ptr,
  354. uint32_t blkcnt, uint32_t blklen)
  355. {
  356. uint32_t val;
  357. uint64_t start_time;
  358. uint32_t wml;
  359. uint32_t wl;
  360. uint32_t dst = (uint32_t)((uint64_t)(dest_ptr));
  361. /* set blkattr when no transactions are executing */
  362. start_time = get_timer_val(0);
  363. while (get_timer_val(start_time) < SD_TIMEOUT_HIGH) {
  364. val = esdhc_in32(&mmc->esdhc_regs->prsstat) & ESDHC_PRSSTAT_DLA;
  365. if (val == 0U) {
  366. break;
  367. }
  368. }
  369. val = esdhc_in32(&mmc->esdhc_regs->prsstat) & ESDHC_PRSSTAT_DLA;
  370. if (val != 0U) {
  371. ERROR("%s: Data line active.Can't set attribute\n", __func__);
  372. return ERROR_ESDHC_COMMUNICATION_ERROR;
  373. }
  374. wml = esdhc_in32(&mmc->esdhc_regs->wml);
  375. wml &= ~(ESDHC_WML_WR_BRST_MASK | ESDHC_WML_RD_BRST_MASK |
  376. ESDHC_WML_RD_WML_MASK | ESDHC_WML_WR_WML_MASK);
  377. if ((mmc->dma_support != 0) && (dest_ptr != NULL)) {
  378. /* Set burst length to 128 bytes */
  379. esdhc_out32(&mmc->esdhc_regs->wml,
  380. wml | ESDHC_WML_WR_BRST(BURST_128_BYTES));
  381. esdhc_out32(&mmc->esdhc_regs->wml,
  382. wml | ESDHC_WML_RD_BRST(BURST_128_BYTES));
  383. /* Set DMA System Destination Address */
  384. esdhc_out32(&mmc->esdhc_regs->dsaddr, dst);
  385. } else {
  386. wl = (blklen >= BLOCK_LEN_512) ?
  387. WML_512_BYTES : ((blklen + 3) / 4);
  388. /* Set 'Read Water Mark Level' register */
  389. esdhc_out32(&mmc->esdhc_regs->wml, wml | ESDHC_WML_RD_WML(wl));
  390. }
  391. /* Configure block Attributes register */
  392. esdhc_out32(&mmc->esdhc_regs->blkattr,
  393. ESDHC_BLKATTR_BLKCNT(blkcnt) | ESDHC_BLKATTR_BLKSZE(blklen));
  394. mmc->block_len = blklen;
  395. return 0;
  396. }
  397. /***************************************************************************
  398. * Function : esdhc_read_data_nodma
  399. * Arguments : mmc - Pointer to mmc struct
  400. * dest_ptr - Buffer where read data is to be copied
  401. * len - Length of Data to be read
  402. * Return : SUCCESS or Error Code
  403. * Description : Read data from the sdhc buffer without using DMA
  404. * and using polling mode
  405. ***************************************************************************/
  406. static int esdhc_read_data_nodma(struct mmc *mmc, void *dest_ptr, uint32_t len)
  407. {
  408. uint32_t i = 0U;
  409. uint32_t status;
  410. uint32_t num_blocks;
  411. uint32_t *dst = (uint32_t *)dest_ptr;
  412. uint32_t val;
  413. uint64_t start_time;
  414. num_blocks = len / mmc->block_len;
  415. while ((num_blocks--) != 0U) {
  416. start_time = get_timer_val(0);
  417. while (get_timer_val(start_time) < SD_TIMEOUT_HIGH) {
  418. val = esdhc_in32(&mmc->esdhc_regs->prsstat) &
  419. ESDHC_PRSSTAT_BREN;
  420. if (val != 0U) {
  421. break;
  422. }
  423. }
  424. val = esdhc_in32(&mmc->esdhc_regs->prsstat)
  425. & ESDHC_PRSSTAT_BREN;
  426. if (val == 0U) {
  427. return ERROR_ESDHC_COMMUNICATION_ERROR;
  428. }
  429. for (i = 0U, status = esdhc_in32(&mmc->esdhc_regs->irqstat);
  430. i < mmc->block_len / 4; i++, dst++) {
  431. /* get data from data port */
  432. val = mmio_read_32(
  433. (uintptr_t)&mmc->esdhc_regs->datport);
  434. esdhc_out32(dst, val);
  435. /* Increment destination pointer */
  436. status = esdhc_in32(&mmc->esdhc_regs->irqstat);
  437. }
  438. /* Check whether the interrupt is an DTOE/DCE/DEBE */
  439. if ((status & (ESDHC_IRQSTAT_DTOE | ESDHC_IRQSTAT_DCE |
  440. ESDHC_IRQSTAT_DEBE)) != 0) {
  441. ERROR("SD read error - DTOE, DCE, DEBE bit set = %x\n",
  442. status);
  443. return ERROR_ESDHC_COMMUNICATION_ERROR;
  444. }
  445. }
  446. /* Wait for TC */
  447. start_time = get_timer_val(0);
  448. while (get_timer_val(start_time) < SD_TIMEOUT_HIGH) {
  449. val = esdhc_in32(&mmc->esdhc_regs->irqstat) & ESDHC_IRQSTAT_TC;
  450. if (val != 0U) {
  451. break;
  452. }
  453. }
  454. val = esdhc_in32(&mmc->esdhc_regs->irqstat) & ESDHC_IRQSTAT_TC;
  455. if (val == 0U) {
  456. ERROR("SD read timeout: Transfer bit not set in IRQSTAT\n");
  457. return ERROR_ESDHC_COMMUNICATION_ERROR;
  458. }
  459. return 0;
  460. }
  461. /***************************************************************************
  462. * Function : esdhc_write_data_nodma
  463. * Arguments : mmc - Pointer to mmc struct
  464. * src_ptr - Buffer where data is copied from
  465. * len - Length of Data to be written
  466. * Return : SUCCESS or Error Code
  467. * Description : Write data to the sdhc buffer without using DMA
  468. * and using polling mode
  469. ***************************************************************************/
  470. static int esdhc_write_data_nodma(struct mmc *mmc, void *src_ptr, uint32_t len)
  471. {
  472. uint32_t i = 0U;
  473. uint32_t status;
  474. uint32_t num_blocks;
  475. uint32_t *src = (uint32_t *)src_ptr;
  476. uint32_t val;
  477. uint64_t start_time;
  478. num_blocks = len / mmc->block_len;
  479. while ((num_blocks--) != 0U) {
  480. start_time = get_timer_val(0);
  481. while (get_timer_val(start_time) < SD_TIMEOUT_HIGH) {
  482. val = esdhc_in32(&mmc->esdhc_regs->prsstat) &
  483. ESDHC_PRSSTAT_BWEN;
  484. if (val != 0U) {
  485. break;
  486. }
  487. }
  488. val = esdhc_in32(&mmc->esdhc_regs->prsstat) &
  489. ESDHC_PRSSTAT_BWEN;
  490. if (val == 0U) {
  491. return ERROR_ESDHC_COMMUNICATION_ERROR;
  492. }
  493. for (i = 0U, status = esdhc_in32(&mmc->esdhc_regs->irqstat);
  494. i < mmc->block_len / 4; i++, src++) {
  495. val = esdhc_in32(src);
  496. /* put data to data port */
  497. mmio_write_32((uintptr_t)&mmc->esdhc_regs->datport,
  498. val);
  499. /* Increment source pointer */
  500. status = esdhc_in32(&mmc->esdhc_regs->irqstat);
  501. }
  502. /* Check whether the interrupt is an DTOE/DCE/DEBE */
  503. if ((status & (ESDHC_IRQSTAT_DTOE | ESDHC_IRQSTAT_DCE |
  504. ESDHC_IRQSTAT_DEBE)) != 0) {
  505. ERROR("SD write error - DTOE, DCE, DEBE bit set = %x\n",
  506. status);
  507. return ERROR_ESDHC_COMMUNICATION_ERROR;
  508. }
  509. }
  510. /* Wait for TC */
  511. start_time = get_timer_val(0);
  512. while (get_timer_val(start_time) < SD_TIMEOUT_HIGH) {
  513. val = esdhc_in32(&mmc->esdhc_regs->irqstat) & ESDHC_IRQSTAT_TC;
  514. if (val != 0U) {
  515. break;
  516. }
  517. }
  518. val = esdhc_in32(&mmc->esdhc_regs->irqstat) & ESDHC_IRQSTAT_TC;
  519. if (val == 0U) {
  520. ERROR("SD write timeout: Transfer bit not set in IRQSTAT\n");
  521. return ERROR_ESDHC_COMMUNICATION_ERROR;
  522. }
  523. return 0;
  524. }
  525. /***************************************************************************
  526. * Function : esdhc_read_data_dma
  527. * Arguments : mmc - Pointer to mmc struct
  528. * len - Length of Data to be read
  529. * Return : SUCCESS or Error Code
  530. * Description : Read data from the sd card using DMA.
  531. ***************************************************************************/
  532. static int esdhc_read_data_dma(struct mmc *mmc, uint32_t len)
  533. {
  534. uint32_t status;
  535. uint32_t tblk;
  536. uint64_t start_time;
  537. tblk = SD_BLOCK_TIMEOUT * (len / mmc->block_len);
  538. start_time = get_timer_val(0);
  539. /* poll till TC is set */
  540. do {
  541. status = esdhc_in32(&mmc->esdhc_regs->irqstat);
  542. if ((status & (ESDHC_IRQSTAT_DEBE | ESDHC_IRQSTAT_DCE
  543. | ESDHC_IRQSTAT_DTOE)) != 0) {
  544. ERROR("SD read error - DTOE, DCE, DEBE bit set = %x\n",
  545. status);
  546. return ERROR_ESDHC_COMMUNICATION_ERROR;
  547. }
  548. if ((status & ESDHC_IRQSTAT_DMAE) != 0) {
  549. ERROR("SD read error - DMA error = %x\n", status);
  550. return ERROR_ESDHC_DMA_ERROR;
  551. }
  552. } while (((status & ESDHC_IRQSTAT_TC) == 0) &&
  553. ((esdhc_in32(&mmc->esdhc_regs->prsstat) & ESDHC_PRSSTAT_DLA) != 0) &&
  554. (get_timer_val(start_time) < SD_TIMEOUT_HIGH + tblk));
  555. if (get_timer_val(start_time) > SD_TIMEOUT_HIGH + tblk) {
  556. ERROR("SD read DMA timeout\n");
  557. return ERROR_ESDHC_COMMUNICATION_ERROR;
  558. }
  559. return 0;
  560. }
  561. /***************************************************************************
  562. * Function : esdhc_write_data_dma
  563. * Arguments : mmc - Pointer to mmc struct
  564. * len - Length of Data to be written
  565. * Return : SUCCESS or Error Code
  566. * Description : Write data to the sd card using DMA.
  567. ***************************************************************************/
  568. static int esdhc_write_data_dma(struct mmc *mmc, uint32_t len)
  569. {
  570. uint32_t status;
  571. uint32_t tblk;
  572. uint64_t start_time;
  573. tblk = SD_BLOCK_TIMEOUT * (len / mmc->block_len);
  574. start_time = get_timer_val(0);
  575. /* poll till TC is set */
  576. do {
  577. status = esdhc_in32(&mmc->esdhc_regs->irqstat);
  578. if ((status & (ESDHC_IRQSTAT_DEBE | ESDHC_IRQSTAT_DCE
  579. | ESDHC_IRQSTAT_DTOE)) != 0) {
  580. ERROR("SD write error - DTOE, DCE, DEBE bit set = %x\n",
  581. status);
  582. return ERROR_ESDHC_COMMUNICATION_ERROR;
  583. }
  584. if ((status & ESDHC_IRQSTAT_DMAE) != 0) {
  585. ERROR("SD write error - DMA error = %x\n", status);
  586. return ERROR_ESDHC_DMA_ERROR;
  587. }
  588. } while (((status & ESDHC_IRQSTAT_TC) == 0) &&
  589. ((esdhc_in32(&mmc->esdhc_regs->prsstat) & ESDHC_PRSSTAT_DLA) != 0) &&
  590. (get_timer_val(start_time) < SD_TIMEOUT_HIGH + tblk));
  591. if (get_timer_val(start_time) > SD_TIMEOUT_HIGH + tblk) {
  592. ERROR("SD write DMA timeout\n");
  593. return ERROR_ESDHC_COMMUNICATION_ERROR;
  594. }
  595. return 0;
  596. }
  597. /***************************************************************************
  598. * Function : esdhc_read_data
  599. * Arguments : mmc - Pointer to mmc struct
  600. * dest_ptr - Buffer where read data is to be copied
  601. * len - Length of Data to be read
  602. * Return : SUCCESS or Error Code
  603. * Description : Calls esdhc_read_data_nodma and clear interrupt status
  604. ***************************************************************************/
  605. int esdhc_read_data(struct mmc *mmc, void *dest_ptr, uint32_t len)
  606. {
  607. int ret;
  608. if (mmc->dma_support && len > 64) {
  609. ret = esdhc_read_data_dma(mmc, len);
  610. } else {
  611. ret = esdhc_read_data_nodma(mmc, dest_ptr, len);
  612. }
  613. /* clear interrupt status */
  614. esdhc_out32(&mmc->esdhc_regs->irqstat, ESDHC_IRQSTAT_CLEAR_ALL);
  615. return ret;
  616. }
  617. /***************************************************************************
  618. * Function : esdhc_write_data
  619. * Arguments : mmc - Pointer to mmc struct
  620. * src_ptr - Buffer where data is copied from
  621. * len - Length of Data to be written
  622. * Return : SUCCESS or Error Code
  623. * Description : Calls esdhc_write_data_nodma and clear interrupt status
  624. ***************************************************************************/
  625. int esdhc_write_data(struct mmc *mmc, void *src_ptr, uint32_t len)
  626. {
  627. int ret;
  628. if (mmc->dma_support && len > 64) {
  629. ret = esdhc_write_data_dma(mmc, len);
  630. } else {
  631. ret = esdhc_write_data_nodma(mmc, src_ptr, len);
  632. }
  633. /* clear interrupt status */
  634. esdhc_out32(&mmc->esdhc_regs->irqstat, ESDHC_IRQSTAT_CLEAR_ALL);
  635. return ret;
  636. }
  637. /***************************************************************************
  638. * Function : sd_switch_to_high_freq
  639. * Arguments : mmc - Pointer to mmc struct
  640. * Return : SUCCESS or Error Code
  641. * Description : 1. Send ACMD51 (CMD_SEND_SCR)
  642. * 2. Read the SCR to check if card supports higher freq
  643. * 3. check version from SCR
  644. * 4. If SD 1.0, return (no Switch) freq = 25 MHz.
  645. * 5. Send CMD6 (CMD_SWITCH_FUNC) with args 0x00FFFFF1 to
  646. * check the status of switch func
  647. * 6. Send CMD6 (CMD_SWITCH_FUNC) With args 0x80FFFFF1 to
  648. * switch to high frequency = 50 Mhz
  649. ***************************************************************************/
  650. static int sd_switch_to_high_freq(struct mmc *mmc)
  651. {
  652. int err;
  653. uint8_t scr[8];
  654. uint8_t status[64];
  655. uint32_t response[4];
  656. uint32_t version;
  657. uint32_t count;
  658. uint32_t sd_versions[] = {SD_CARD_VERSION_1_0, SD_CARD_VERSION_1_10,
  659. SD_CARD_VERSION_2_0};
  660. mmc->card.bus_freq = SD_SS_25MHZ;
  661. /* Send Application command */
  662. err = esdhc_send_cmd(mmc, CMD_APP_CMD, mmc->card.rca << 16);
  663. if (err != 0) {
  664. return err;
  665. }
  666. err = esdhc_wait_response(mmc, response);
  667. if (err != 0) {
  668. return err;
  669. }
  670. esdhc_set_data_attributes(mmc, NULL, 1, 8);
  671. /* Read the SCR to find out if this card supports higher speeds */
  672. err = esdhc_send_cmd(mmc, CMD_SEND_SCR, mmc->card.rca << 16);
  673. if (err != 0) {
  674. return err;
  675. }
  676. err = esdhc_wait_response(mmc, response);
  677. if (err != 0) {
  678. return err;
  679. }
  680. /* read 8 bytes of scr data */
  681. err = esdhc_read_data(mmc, scr, 8U);
  682. if (err != 0) {
  683. return ERROR_ESDHC_COMMUNICATION_ERROR;
  684. }
  685. /* check version from SCR */
  686. version = scr[0] & U(0xF);
  687. if (version <= 2U) {
  688. mmc->card.version = sd_versions[version];
  689. } else {
  690. mmc->card.version = SD_CARD_VERSION_2_0;
  691. }
  692. /* does not support switch func */
  693. if (mmc->card.version == SD_CARD_VERSION_1_0) {
  694. return 0;
  695. }
  696. /* read 64 bytes of status */
  697. esdhc_set_data_attributes(mmc, NULL, 1U, 64U);
  698. /* check the status of switch func */
  699. for (count = 0U; count < 4U; count++) {
  700. err = esdhc_send_cmd(mmc, CMD_SWITCH_FUNC,
  701. SD_SWITCH_FUNC_CHECK_MODE);
  702. if (err != 0) {
  703. return err;
  704. }
  705. err = esdhc_wait_response(mmc, response);
  706. if (err != 0) {
  707. return err;
  708. }
  709. /* read 64 bytes of scr data */
  710. err = esdhc_read_data(mmc, status, 64U);
  711. if (err != 0) {
  712. return ERROR_ESDHC_COMMUNICATION_ERROR;
  713. }
  714. if ((status[29] & SD_SWITCH_FUNC_HIGH_SPEED) == 0) {
  715. break;
  716. }
  717. }
  718. if ((status[13] & SD_SWITCH_FUNC_HIGH_SPEED) == 0) {
  719. return 0;
  720. }
  721. /* SWITCH */
  722. esdhc_set_data_attributes(mmc, NULL, 1, 64);
  723. err = esdhc_send_cmd(mmc, CMD_SWITCH_FUNC, SD_SWITCH_FUNC_SWITCH_MODE);
  724. if (err != 0) {
  725. return err;
  726. }
  727. err = esdhc_wait_response(mmc, response);
  728. if (err != 0) {
  729. return err;
  730. }
  731. err = esdhc_read_data(mmc, status, 64U);
  732. if (err != 0) {
  733. return ERROR_ESDHC_COMMUNICATION_ERROR;
  734. }
  735. if ((status[16]) == U(0x01)) {
  736. mmc->card.bus_freq = SD_HS_50MHZ;
  737. }
  738. return 0;
  739. }
  740. /***************************************************************************
  741. * Function : change_state_to_transfer_state
  742. * Arguments : mmc - Pointer to mmc struct
  743. * Return : SUCCESS or Error Code
  744. * Description : 1. Send CMD7 (CMD_SELECT_CARD) to toggles the card
  745. * between stand-by and transfer state
  746. * 2. Send CMD13 (CMD_SEND_STATUS) to check state as
  747. * Transfer State
  748. ***************************************************************************/
  749. static int change_state_to_transfer_state(struct mmc *mmc)
  750. {
  751. int error = 0;
  752. uint32_t response[4];
  753. uint64_t start_time;
  754. /* Command CMD_SELECT_CARD/CMD7 toggles the card between stand-by
  755. * and transfer states
  756. */
  757. error = esdhc_send_cmd(mmc, CMD_SELECT_CARD, mmc->card.rca << 16);
  758. if (error != 0) {
  759. return error;
  760. }
  761. error = esdhc_wait_response(mmc, response);
  762. if (error != 0) {
  763. return error;
  764. }
  765. start_time = get_timer_val(0);
  766. while (get_timer_val(start_time) < SD_TIMEOUT_HIGH) {
  767. /* send CMD13 to check card status */
  768. error = esdhc_send_cmd(mmc,
  769. CMD_SEND_STATUS, mmc->card.rca << 16);
  770. if (error != 0) {
  771. return error;
  772. }
  773. error = esdhc_wait_response(mmc, response);
  774. if ((error != 0) || ((response[0] & R1_ERROR) != 0)) {
  775. return error;
  776. }
  777. /* Check for the present state of card */
  778. if (((response[0] >> 9U) & U(0xF)) == STATE_TRAN) {
  779. break;
  780. }
  781. }
  782. if (((response[0] >> 9U) & U(0xF)) == STATE_TRAN) {
  783. return 0;
  784. } else {
  785. return ERROR_ESDHC_COMMUNICATION_ERROR;
  786. }
  787. }
  788. /***************************************************************************
  789. * Function : get_cid_rca_csd
  790. * Arguments : mmc - Pointer to mmc struct
  791. * Return : SUCCESS or Error Code
  792. * Description : 1. Send CMD2 (CMD_ALL_SEND_CID)
  793. * 2. get RCA for SD cards, set rca for mmc cards
  794. * Send CMD3 (CMD_SEND_RELATIVE_ADDR)
  795. * 3. Send CMD9 (CMD_SEND_CSD)
  796. * 4. Get MMC Version from CSD
  797. ***************************************************************************/
  798. static int get_cid_rca_csd(struct mmc *mmc)
  799. {
  800. int err;
  801. uint32_t version;
  802. uint32_t response[4];
  803. uint32_t mmc_version[] = {MMC_CARD_VERSION_1_2, MMC_CARD_VERSION_1_4,
  804. MMC_CARD_VERSION_2_X, MMC_CARD_VERSION_3_X,
  805. MMC_CARD_VERSION_4_X};
  806. err = esdhc_send_cmd(mmc, CMD_ALL_SEND_CID, 0);
  807. if (err != 0) {
  808. return err;
  809. }
  810. err = esdhc_wait_response(mmc, response);
  811. if (err != 0) {
  812. return err;
  813. }
  814. /* get RCA for SD cards, set rca for mmc cards */
  815. mmc->card.rca = SD_MMC_CARD_RCA;
  816. /* send RCA cmd */
  817. err = esdhc_send_cmd(mmc, CMD_SEND_RELATIVE_ADDR, mmc->card.rca << 16);
  818. if (err != 0) {
  819. return err;
  820. }
  821. err = esdhc_wait_response(mmc, response);
  822. if (err != 0) {
  823. return err;
  824. }
  825. /* for SD, get the the RCA */
  826. if (mmc->card.type == SD_CARD) {
  827. mmc->card.rca = (response[0] >> 16) & 0xFFFF;
  828. }
  829. /* Get the CSD (card specific data) from card. */
  830. err = esdhc_send_cmd(mmc, CMD_SEND_CSD, mmc->card.rca << 16);
  831. if (err != 0) {
  832. return err;
  833. }
  834. err = esdhc_wait_response(mmc, response);
  835. if (err != 0) {
  836. return err;
  837. }
  838. version = (response[3] >> 18U) & U(0xF);
  839. if (mmc->card.type == MMC_CARD) {
  840. if (version <= MMC_CARD_VERSION_4_X) {
  841. mmc->card.version = mmc_version[version];
  842. } else {
  843. mmc->card.version = MMC_CARD_VERSION_4_X;
  844. }
  845. }
  846. mmc->card.block_len = 1 << ((response[2] >> 8) & 0xF);
  847. if (mmc->card.block_len > BLOCK_LEN_512) {
  848. mmc->card.block_len = BLOCK_LEN_512;
  849. }
  850. return 0;
  851. }
  852. /***************************************************************************
  853. * Function : identify_mmc_card
  854. * Arguments : mmc - Pointer to mmc struct
  855. * Return : SUCCESS or Error Code
  856. * Description : 1. Send Reset Command
  857. * 2. Send CMD1 with args to set voltage range and Sector
  858. * Mode. (Voltage Args = 0xFF8)
  859. * 3. Check the OCR Response
  860. ***************************************************************************/
  861. static int identify_mmc_card(struct mmc *mmc)
  862. {
  863. uint64_t start_time;
  864. uint32_t resp[4];
  865. int ret;
  866. uint32_t args;
  867. /* card reset */
  868. ret = esdhc_send_cmd(mmc, CMD_GO_IDLE_STATE, 0U);
  869. if (ret != 0) {
  870. return ret;
  871. }
  872. ret = esdhc_wait_response(mmc, resp);
  873. if (ret != 0) {
  874. return ret;
  875. }
  876. /* Send CMD1 to get the ocr value repeatedly till the card */
  877. /* busy is clear. timeout = 20sec */
  878. start_time = get_timer_val(0);
  879. do {
  880. /* set the bits for the voltage ranges supported by host */
  881. args = mmc->voltages_caps | MMC_OCR_SECTOR_MODE;
  882. ret = esdhc_send_cmd(mmc, CMD_MMC_SEND_OP_COND, args);
  883. if (ret != 0) {
  884. return ret;
  885. }
  886. ret = esdhc_wait_response(mmc, resp);
  887. if (ret != 0) {
  888. return ERROR_ESDHC_UNUSABLE_CARD;
  889. }
  890. } while (((resp[0] & MMC_OCR_BUSY) == 0U) &&
  891. (get_timer_val(start_time) < SD_TIMEOUT_HIGH));
  892. if (get_timer_val(start_time) > SD_TIMEOUT_HIGH) {
  893. return ERROR_ESDHC_UNUSABLE_CARD;
  894. }
  895. if ((resp[0] & MMC_OCR_CCS) == MMC_OCR_CCS) {
  896. mmc->card.is_high_capacity = 1;
  897. }
  898. return MMC_CARD;
  899. }
  900. /***************************************************************************
  901. * Function : check_for_sd_card
  902. * Arguments : mmc - Pointer to mmc struct
  903. * Return : SUCCESS or Error Code
  904. * Description : 1. Send Reset Command
  905. * 2. Send CMD8 with pattern 0xAA (to check for SD 2.0)
  906. * 3. Send ACMD41 with args to set voltage range and HCS
  907. * HCS is set only for SD Card > 2.0
  908. * Voltage Caps = 0xFF8
  909. * 4. Check the OCR Response
  910. ***************************************************************************/
  911. static int check_for_sd_card(struct mmc *mmc)
  912. {
  913. uint64_t start_time;
  914. uint32_t args;
  915. int ret;
  916. uint32_t resp[4];
  917. /* Send reset command */
  918. ret = esdhc_send_cmd(mmc, CMD_GO_IDLE_STATE, 0U);
  919. if (ret != 0) {
  920. return ret;
  921. }
  922. ret = esdhc_wait_response(mmc, resp);
  923. if (ret != 0) {
  924. return ret;
  925. }
  926. /* send CMD8 with pattern 0xAA */
  927. args = MMC_VDD_HIGH_VOLTAGE | 0xAA;
  928. ret = esdhc_send_cmd(mmc, CMD_SEND_IF_COND, args);
  929. if (ret != 0) {
  930. return ret;
  931. }
  932. ret = esdhc_wait_response(mmc, resp);
  933. if (ret == RESP_TIMEOUT) { /* sd ver 1.x or not sd */
  934. mmc->card.is_high_capacity = 0;
  935. } else if ((resp[0] & U(0xFF)) == U(0xAA)) { /* ver 2.0 or later */
  936. mmc->card.version = SD_CARD_VERSION_2_0;
  937. } else {
  938. return NOT_SD_CARD;
  939. }
  940. /* Send Application command-55 to get the ocr value repeatedly till
  941. * the card busy is clear. timeout = 20sec
  942. */
  943. start_time = get_timer_val(0);
  944. do {
  945. ret = esdhc_send_cmd(mmc, CMD_APP_CMD, 0U);
  946. if (ret != 0) {
  947. return ret;
  948. }
  949. ret = esdhc_wait_response(mmc, resp);
  950. if (ret == COMMAND_ERROR) {
  951. return ERROR_ESDHC_UNUSABLE_CARD;
  952. }
  953. /* set the bits for the voltage ranges supported by host */
  954. args = mmc->voltages_caps;
  955. if (mmc->card.version == SD_CARD_VERSION_2_0) {
  956. args |= SD_OCR_HCS;
  957. }
  958. /* Send ACMD41 to set voltage range */
  959. ret = esdhc_send_cmd(mmc, CMD_SD_SEND_OP_COND, args);
  960. if (ret != 0) {
  961. return ret;
  962. }
  963. ret = esdhc_wait_response(mmc, resp);
  964. if (ret == COMMAND_ERROR) {
  965. return ERROR_ESDHC_UNUSABLE_CARD;
  966. } else if (ret == RESP_TIMEOUT) {
  967. return NOT_SD_CARD;
  968. }
  969. } while (((resp[0] & MMC_OCR_BUSY) == 0U) &&
  970. (get_timer_val(start_time) < SD_TIMEOUT_HIGH));
  971. if (get_timer_val(start_time) > SD_TIMEOUT_HIGH) {
  972. INFO("SD_TIMEOUT_HIGH\n");
  973. return ERROR_ESDHC_UNUSABLE_CARD;
  974. }
  975. /* bit set in card capacity status */
  976. if ((resp[0] & MMC_OCR_CCS) == MMC_OCR_CCS) {
  977. mmc->card.is_high_capacity = 1;
  978. }
  979. return SD_CARD;
  980. }
  981. /***************************************************************************
  982. * Function : esdhc_emmc_init
  983. * Arguments : mmc - Pointer to mmc struct
  984. * src_emmc - Flag to Indicate SRC as emmc
  985. * Return : SUCCESS or Error Code (< 0)
  986. * Description : Base Function called from sd_mmc_init or emmc_init
  987. ***************************************************************************/
  988. int esdhc_emmc_init(struct mmc *mmc, bool card_detect)
  989. {
  990. int error = 0;
  991. int ret = 0;
  992. error = esdhc_init(mmc, card_detect);
  993. if (error != 0) {
  994. return error;
  995. }
  996. mmc->card.bus_freq = CARD_IDENTIFICATION_FREQ;
  997. mmc->card.rca = 0;
  998. mmc->card.is_high_capacity = 0;
  999. mmc->card.type = ERROR_ESDHC_UNUSABLE_CARD;
  1000. /* Set Voltage caps as FF8 i.e all supported */
  1001. /* high voltage bits 2.7 - 3.6 */
  1002. mmc->voltages_caps = MMC_OCR_VDD_FF8;
  1003. #ifdef NXP_SD_DMA_CAPABILITY
  1004. /* Getting host DMA capabilities. */
  1005. mmc->dma_support = esdhc_in32(&mmc->esdhc_regs->hostcapblt) &
  1006. ESDHC_HOSTCAPBLT_DMAS;
  1007. #else
  1008. mmc->dma_support = 0;
  1009. #endif
  1010. ret = NOT_SD_CARD;
  1011. /* If SRC is not EMMC, check for SD or MMC */
  1012. ret = check_for_sd_card(mmc);
  1013. switch (ret) {
  1014. case SD_CARD:
  1015. mmc->card.type = SD_CARD;
  1016. break;
  1017. case NOT_SD_CARD:
  1018. /* try for MMC card */
  1019. if (identify_mmc_card(mmc) == MMC_CARD) {
  1020. mmc->card.type = MMC_CARD;
  1021. } else {
  1022. return ERROR_ESDHC_UNUSABLE_CARD;
  1023. }
  1024. break;
  1025. default:
  1026. return ERROR_ESDHC_UNUSABLE_CARD;
  1027. }
  1028. /* get CID, RCA and CSD. For MMC, set the rca */
  1029. error = get_cid_rca_csd(mmc);
  1030. if (error != 0) {
  1031. return ERROR_ESDHC_COMMUNICATION_ERROR;
  1032. }
  1033. /* change state to Transfer mode */
  1034. error = change_state_to_transfer_state(mmc);
  1035. if (error != 0) {
  1036. return ERROR_ESDHC_COMMUNICATION_ERROR;
  1037. }
  1038. /* change to high frequency if supported */
  1039. if (mmc->card.type == SD_CARD) {
  1040. error = sd_switch_to_high_freq(mmc);
  1041. } else {
  1042. error = mmc_switch_to_high_frquency(mmc);
  1043. }
  1044. if (error != 0) {
  1045. return ERROR_ESDHC_COMMUNICATION_ERROR;
  1046. }
  1047. /* mmc: 20000000, 26000000, 52000000 */
  1048. /* sd: 25000000, 50000000 */
  1049. set_speed(mmc, mmc->card.bus_freq);
  1050. INFO("init done:\n");
  1051. return 0;
  1052. }
  1053. /***************************************************************************
  1054. * Function : sd_mmc_init
  1055. * Arguments : mmc - Pointer to mmc struct
  1056. * Return : SUCCESS or Error Code
  1057. * Description : Base Function called via hal_init for SD/MMC
  1058. * initialization
  1059. ***************************************************************************/
  1060. int sd_mmc_init(uintptr_t nxp_esdhc_addr, bool card_detect)
  1061. {
  1062. struct mmc *mmc = NULL;
  1063. int ret;
  1064. mmc = &mmc_drv_data;
  1065. memset(mmc, 0, sizeof(struct mmc));
  1066. mmc->esdhc_regs = (struct esdhc_regs *)nxp_esdhc_addr;
  1067. INFO("esdhc_emmc_init\n");
  1068. ret = esdhc_emmc_init(mmc, card_detect);
  1069. return ret;
  1070. }
  1071. /***************************************************************************
  1072. * Function : esdhc_read_block
  1073. * Arguments : mmc - Pointer to mmc struct
  1074. * dst - Destination Pointer
  1075. * block - Block Number
  1076. * Return : SUCCESS or Error Code
  1077. * Description : Read a Single block to Destination Pointer
  1078. * 1. Send CMD16 (CMD_SET_BLOCKLEN) with args as blocklen
  1079. * 2. Send CMD17 (CMD_READ_SINGLE_BLOCK) with args offset
  1080. ***************************************************************************/
  1081. static int esdhc_read_block(struct mmc *mmc, void *dst, uint32_t block)
  1082. {
  1083. uint32_t offset;
  1084. int err;
  1085. /* send cmd16 to set the block size. */
  1086. err = esdhc_send_cmd(mmc, CMD_SET_BLOCKLEN, mmc->card.block_len);
  1087. if (err != 0) {
  1088. return err;
  1089. }
  1090. err = esdhc_wait_response(mmc, NULL);
  1091. if (err != 0) {
  1092. return ERROR_ESDHC_COMMUNICATION_ERROR;
  1093. }
  1094. if (mmc->card.is_high_capacity != 0) {
  1095. offset = block;
  1096. } else {
  1097. offset = block * mmc->card.block_len;
  1098. }
  1099. esdhc_set_data_attributes(mmc, dst, 1, mmc->card.block_len);
  1100. err = esdhc_send_cmd(mmc, CMD_READ_SINGLE_BLOCK, offset);
  1101. if (err != 0) {
  1102. return err;
  1103. }
  1104. err = esdhc_wait_response(mmc, NULL);
  1105. if (err != 0) {
  1106. return err;
  1107. }
  1108. err = esdhc_read_data(mmc, dst, mmc->card.block_len);
  1109. return err;
  1110. }
  1111. /***************************************************************************
  1112. * Function : esdhc_write_block
  1113. * Arguments : mmc - Pointer to mmc struct
  1114. * src - Source Pointer
  1115. * block - Block Number
  1116. * Return : SUCCESS or Error Code
  1117. * Description : Write a Single block from Source Pointer
  1118. * 1. Send CMD16 (CMD_SET_BLOCKLEN) with args as blocklen
  1119. * 2. Send CMD24 (CMD_WRITE_SINGLE_BLOCK) with args offset
  1120. ***************************************************************************/
  1121. static int esdhc_write_block(struct mmc *mmc, void *src, uint32_t block)
  1122. {
  1123. uint32_t offset;
  1124. int err;
  1125. /* send cmd16 to set the block size. */
  1126. err = esdhc_send_cmd(mmc, CMD_SET_BLOCKLEN, mmc->card.block_len);
  1127. if (err != 0) {
  1128. return err;
  1129. }
  1130. err = esdhc_wait_response(mmc, NULL);
  1131. if (err != 0) {
  1132. return ERROR_ESDHC_COMMUNICATION_ERROR;
  1133. }
  1134. if (mmc->card.is_high_capacity != 0) {
  1135. offset = block;
  1136. } else {
  1137. offset = block * mmc->card.block_len;
  1138. }
  1139. esdhc_set_data_attributes(mmc, src, 1, mmc->card.block_len);
  1140. err = esdhc_send_cmd(mmc, CMD_WRITE_SINGLE_BLOCK, offset);
  1141. if (err != 0) {
  1142. return err;
  1143. }
  1144. err = esdhc_wait_response(mmc, NULL);
  1145. if (err != 0) {
  1146. return err;
  1147. }
  1148. err = esdhc_write_data(mmc, src, mmc->card.block_len);
  1149. return err;
  1150. }
  1151. /***************************************************************************
  1152. * Function : esdhc_read
  1153. * Arguments : src_offset - offset on sd/mmc to read from. Should be block
  1154. * size aligned
  1155. * dst - Destination Pointer
  1156. * size - Length of Data ( Multiple of block size)
  1157. * Return : SUCCESS or Error Code
  1158. * Description : Calls esdhc_read_block repeatedly for reading the
  1159. * data.
  1160. ***************************************************************************/
  1161. int esdhc_read(struct mmc *mmc, uint32_t src_offset, uintptr_t dst, size_t size)
  1162. {
  1163. int error = 0;
  1164. uint32_t blk, num_blocks;
  1165. uint8_t *buff = (uint8_t *)dst;
  1166. #ifdef NXP_SD_DEBUG
  1167. INFO("sd mmc read\n");
  1168. INFO("src = %x, dst = %lxsize = %lu\n", src_offset, dst, size);
  1169. #endif
  1170. /* check for size */
  1171. if (size == 0) {
  1172. return 0;
  1173. }
  1174. if ((size % mmc->card.block_len) != 0) {
  1175. ERROR("Size is not block aligned\n");
  1176. return -1;
  1177. }
  1178. if ((src_offset % mmc->card.block_len) != 0) {
  1179. ERROR("Size is not block aligned\n");
  1180. return -1;
  1181. }
  1182. /* start block */
  1183. blk = src_offset / mmc->card.block_len;
  1184. #ifdef NXP_SD_DEBUG
  1185. INFO("blk = %x\n", blk);
  1186. #endif
  1187. /* Number of blocks to be read */
  1188. num_blocks = size / mmc->card.block_len;
  1189. while (num_blocks) {
  1190. error = esdhc_read_block(mmc, buff, blk);
  1191. if (error != 0) {
  1192. ERROR("Read error = %x\n", error);
  1193. return error;
  1194. }
  1195. buff = buff + mmc->card.block_len;
  1196. blk++;
  1197. num_blocks--;
  1198. }
  1199. INFO("sd-mmc read done.\n");
  1200. return error;
  1201. }
  1202. /***************************************************************************
  1203. * Function : esdhc_write
  1204. * Arguments : src - Source Pointer
  1205. * dst_offset - offset on sd/mmc to write to. Should be block
  1206. * size aligned
  1207. * size - Length of Data (Multiple of block size)
  1208. * Return : SUCCESS or Error Code
  1209. * Description : Calls esdhc_write_block repeatedly for writing the
  1210. * data.
  1211. ***************************************************************************/
  1212. int esdhc_write(struct mmc *mmc, uintptr_t src, uint32_t dst_offset,
  1213. size_t size)
  1214. {
  1215. int error = 0;
  1216. uint32_t blk, num_blocks;
  1217. uint8_t *buff = (uint8_t *)src;
  1218. #ifdef NXP_SD_DEBUG
  1219. INFO("sd mmc write\n");
  1220. INFO("src = %x, dst = %lxsize = %lu\n", src, dst_offset, size);
  1221. #endif
  1222. /* check for size */
  1223. if (size == 0) {
  1224. return 0;
  1225. }
  1226. if ((size % mmc->card.block_len) != 0) {
  1227. ERROR("Size is not block aligned\n");
  1228. return -1;
  1229. }
  1230. if ((dst_offset % mmc->card.block_len) != 0) {
  1231. ERROR("Size is not block aligned\n");
  1232. return -1;
  1233. }
  1234. /* start block */
  1235. blk = dst_offset / mmc->card.block_len;
  1236. #ifdef NXP_SD_DEBUG
  1237. INFO("blk = %x\n", blk);
  1238. #endif
  1239. /* Number of blocks to be written */
  1240. num_blocks = size / mmc->card.block_len;
  1241. while (num_blocks != 0U) {
  1242. error = esdhc_write_block(mmc, buff, blk);
  1243. if (error != 0U) {
  1244. ERROR("Write error = %x\n", error);
  1245. return error;
  1246. }
  1247. buff = buff + mmc->card.block_len;
  1248. blk++;
  1249. num_blocks--;
  1250. }
  1251. INFO("sd-mmc write done.\n");
  1252. return error;
  1253. }
  1254. static size_t ls_sd_emmc_read(int lba, uintptr_t buf, size_t size)
  1255. {
  1256. struct mmc *mmc = NULL;
  1257. int ret;
  1258. mmc = &mmc_drv_data;
  1259. lba *= BLOCK_LEN_512;
  1260. ret = esdhc_read(mmc, lba, buf, size);
  1261. return ret ? 0 : size;
  1262. }
  1263. static struct io_block_dev_spec ls_emmc_dev_spec = {
  1264. .buffer = {
  1265. .offset = 0,
  1266. .length = 0,
  1267. },
  1268. .ops = {
  1269. .read = ls_sd_emmc_read,
  1270. },
  1271. .block_size = BLOCK_LEN_512,
  1272. };
  1273. int sd_emmc_init(uintptr_t *block_dev_spec,
  1274. uintptr_t nxp_esdhc_addr,
  1275. size_t nxp_sd_block_offset,
  1276. size_t nxp_sd_block_size,
  1277. bool card_detect)
  1278. {
  1279. int ret;
  1280. ret = sd_mmc_init(nxp_esdhc_addr, card_detect);
  1281. if (ret != 0) {
  1282. return ret;
  1283. }
  1284. ls_emmc_dev_spec.buffer.offset = nxp_sd_block_offset;
  1285. ls_emmc_dev_spec.buffer.length = nxp_sd_block_size;
  1286. *block_dev_spec = (uintptr_t)&ls_emmc_dev_spec;
  1287. return 0;
  1288. }