apusys_rv_mbox_mpu.h 1.5 KB

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  1. /*
  2. * Copyright (c) 2023-2024, MediaTek Inc. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef APUSYS_RV_MBOX_MPU_H
  7. #define APUSYS_RV_MBOX_MPU_H
  8. #define MPU_EN (0)
  9. #define MPU_DIS (1)
  10. #define MBOX0_TX_DOMAIN (0)
  11. #define MBOX0_TX_NS (1)
  12. #define MBOX4_RX_DOMAIN (0)
  13. #define MBOX4_RX_NS (0)
  14. #define MBOX5_TX_DOMAIN (3)
  15. #define MBOX5_TX_NS (0)
  16. #define MBOXN_RX_DOMAIN (5)
  17. #define MBOXN_RX_NS (1)
  18. #define MBOXN_TX_DOMAIN (0)
  19. #define MBOXN_TX_NS (0)
  20. struct mbox_mpu_setting {
  21. uint32_t no_mpu;
  22. uint32_t rx_ns;
  23. uint32_t rx_domain;
  24. uint32_t tx_ns;
  25. uint32_t tx_domain;
  26. };
  27. static const struct mbox_mpu_setting mbox_mpu_setting_tab[] = {
  28. { MPU_EN, MBOXN_RX_NS, MBOXN_RX_DOMAIN, MBOX0_TX_NS, MBOX0_TX_DOMAIN },
  29. { MPU_EN, MBOXN_RX_NS, MBOXN_RX_DOMAIN, MBOXN_TX_NS, MBOXN_TX_DOMAIN },
  30. { MPU_EN, MBOXN_RX_NS, MBOXN_RX_DOMAIN, MBOXN_TX_NS, MBOXN_TX_DOMAIN },
  31. { MPU_EN, MBOXN_RX_NS, MBOXN_RX_DOMAIN, MBOXN_TX_NS, MBOXN_TX_DOMAIN },
  32. { MPU_DIS, MBOX4_RX_NS, MBOX4_RX_DOMAIN, MBOXN_TX_NS, MBOXN_TX_DOMAIN },
  33. { MPU_EN, MBOXN_RX_NS, MBOXN_RX_DOMAIN, MBOX5_TX_NS, MBOX5_TX_DOMAIN },
  34. { MPU_EN, MBOXN_RX_NS, MBOXN_RX_DOMAIN, MBOXN_TX_NS, MBOXN_TX_DOMAIN },
  35. { MPU_EN, MBOXN_RX_NS, MBOXN_RX_DOMAIN, MBOXN_TX_NS, MBOXN_TX_DOMAIN },
  36. { MPU_EN, MBOXN_RX_NS, MBOXN_RX_DOMAIN, MBOXN_TX_NS, MBOXN_TX_DOMAIN },
  37. { MPU_EN, MBOXN_RX_NS, MBOXN_RX_DOMAIN, MBOXN_TX_NS, MBOXN_TX_DOMAIN },
  38. };
  39. #define APU_MBOX_NUM ARRAY_SIZE(mbox_mpu_setting_tab)
  40. #endif /* APUSYS_RV_MBOX_MPU_H */