stm32_pka.c 20 KB

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  1. /*
  2. * Copyright (c) 2022, STMicroelectronics - All Rights Reserved
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <assert.h>
  7. #include <errno.h>
  8. #include <stdint.h>
  9. #include <drivers/clk.h>
  10. #include <drivers/delay_timer.h>
  11. #include <drivers/st/stm32_pka.h>
  12. #include <drivers/st/stm32mp_reset.h>
  13. #include <lib/mmio.h>
  14. #include <lib/utils.h>
  15. #include <libfdt.h>
  16. #include <plat/common/platform.h>
  17. #include <platform_def.h>
  18. /*
  19. * For our comprehension in this file
  20. * _len are in BITs
  21. * _size are in BYTEs
  22. * _nbw are in number of PKA_word (PKA_word = u64)
  23. */
  24. #define UINT8_LEN 8U
  25. #define UINT64_LEN (UINT8_LEN * sizeof(uint64_t))
  26. #define WORD_SIZE (sizeof(uint64_t))
  27. #define OP_NBW_FROM_LEN(len) (DIV_ROUND_UP_2EVAL((len), UINT64_LEN) + 1)
  28. #define OP_NBW_FROM_SIZE(s) OP_NBW_FROM_LEN((s) * UINT8_LEN)
  29. #define OP_SIZE_FROM_SIZE(s) (OP_NBW_FROM_SIZE(s) * WORD_SIZE)
  30. #define DT_PKA_COMPAT "st,stm32-pka64"
  31. #define MAX_ECC_SIZE_LEN 640U
  32. #define MAX_EO_NBW OP_NBW_FROM_LEN(MAX_ECC_SIZE_LEN)
  33. /* PKA registers */
  34. /* PKA control register */
  35. #define _PKA_CR 0x0U
  36. /* PKA status register */
  37. #define _PKA_SR 0x4U
  38. /* PKA clear flag register */
  39. #define _PKA_CLRFR 0x8U
  40. /* PKA version register */
  41. #define _PKA_VERR 0x1FF4U
  42. /* PKA identification register */
  43. #define _PKA_IPIDR 0x1FF8U
  44. /* PKA control register fields */
  45. #define _PKA_CR_MODE_MASK GENMASK(13, 8)
  46. #define _PKA_CR_MODE_SHIFT 8U
  47. #define _PKA_CR_MODE_ADD 0x9U
  48. #define _PKA_CR_MODE_ECDSA_VERIF 0x26U
  49. #define _PKA_CR_START BIT(1)
  50. #define _PKA_CR_EN BIT(0)
  51. /* PKA status register fields */
  52. #define _PKA_SR_BUSY BIT(16)
  53. #define _PKA_SR_LMF BIT(1)
  54. #define _PKA_SR_INITOK BIT(0)
  55. /* PKA it flag fields (used in CR, SR and CLRFR) */
  56. #define _PKA_IT_MASK (GENMASK(21, 19) | BIT(17))
  57. #define _PKA_IT_SHIFT 17U
  58. #define _PKA_IT_OPERR BIT(21)
  59. #define _PKA_IT_ADDRERR BIT(20)
  60. #define _PKA_IT_RAMERR BIT(19)
  61. #define _PKA_IT_PROCEND BIT(17)
  62. /* PKA version register fields */
  63. #define _PKA_VERR_MAJREV_MASK GENMASK(7, 4)
  64. #define _PKA_VERR_MAJREV_SHIFT 4U
  65. #define _PKA_VERR_MINREV_MASK GENMASK(3, 0)
  66. #define _PKA_VERR_MINREV_SHIFT 0U
  67. /* RAM magic offset */
  68. #define _PKA_RAM_START 0x400U
  69. #define _PKA_RAM_SIZE 5336U
  70. /* ECDSA verification */
  71. #define _PKA_RAM_N_LEN 0x408U /* 64 */
  72. #define _PKA_RAM_P_LEN 0x4C8U /* 64 */
  73. #define _PKA_RAM_A_SIGN 0x468U /* 64 */
  74. #define _PKA_RAM_A 0x470U /* EOS */
  75. #define _PKA_RAM_P 0x4D0U /* EOS */
  76. #define _PKA_RAM_XG 0x678U /* EOS */
  77. #define _PKA_RAM_YG 0x6D0U /* EOS */
  78. #define _PKA_RAM_XQ 0x12F8U /* EOS */
  79. #define _PKA_RAM_YQ 0x1350U /* EOS */
  80. #define _PKA_RAM_SIGN_R 0x10E0U /* EOS */
  81. #define _PKA_RAM_SIGN_S 0xC68U /* EOS */
  82. #define _PKA_RAM_HASH_Z 0x13A8U /* EOS */
  83. #define _PKA_RAM_PRIME_N 0x1088U /* EOS */
  84. #define _PKA_RAM_ECDSA_VERIFY 0x5D0U /* 64 */
  85. #define _PKA_RAM_ECDSA_VERIFY_VALID 0xD60DULL
  86. #define _PKA_RAM_ECDSA_VERIFY_INVALID 0xA3B7ULL
  87. #define PKA_TIMEOUT_US 1000000U
  88. #define TIMEOUT_US_1MS 1000U
  89. #define PKA_RESET_DELAY 20U
  90. struct curve_parameters {
  91. uint32_t a_sign; /* 0 positive, 1 negative */
  92. uint8_t *a; /* Curve coefficient |a| */
  93. size_t a_size;
  94. uint8_t *p; /* Curve modulus value */
  95. uint32_t p_len;
  96. uint8_t *xg; /* Curve base point G coordinate x */
  97. size_t xg_size;
  98. uint8_t *yg; /* Curve base point G coordinate y */
  99. size_t yg_size;
  100. uint8_t *n; /* Curve prime order n */
  101. uint32_t n_len;
  102. };
  103. static const struct curve_parameters curve_def[] = {
  104. #if PKA_USE_NIST_P256
  105. [PKA_NIST_P256] = {
  106. .p_len = 256U,
  107. .n_len = 256U,
  108. .p = (uint8_t[]){0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x01,
  109. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  110. 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
  111. 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF},
  112. .n = (uint8_t[]){0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
  113. 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
  114. 0xBC, 0xE6, 0xFA, 0xAD, 0xA7, 0x17, 0x9E, 0x84,
  115. 0xF3, 0xB9, 0xCA, 0xC2, 0xFC, 0x63, 0x25, 0x51},
  116. .a_sign = 1U,
  117. .a = (uint8_t[]){0x03},
  118. .a_size = 1U,
  119. .xg = (uint8_t[]){0x6B, 0x17, 0xD1, 0xF2, 0xE1, 0x2C, 0x42, 0x47,
  120. 0xF8, 0xBC, 0xE6, 0xE5, 0x63, 0xA4, 0x40, 0xF2,
  121. 0x77, 0x03, 0x7D, 0x81, 0x2D, 0xEB, 0x33, 0xA0,
  122. 0xF4, 0xA1, 0x39, 0x45, 0xD8, 0x98, 0xC2, 0x96},
  123. .xg_size = 32U,
  124. .yg = (uint8_t[]){0x4F, 0xE3, 0x42, 0xE2, 0xFE, 0x1A, 0x7F, 0x9B,
  125. 0x8E, 0xE7, 0xEB, 0x4A, 0x7C, 0x0F, 0x9E, 0x16,
  126. 0x2B, 0xCE, 0x33, 0x57, 0x6B, 0x31, 0x5E, 0xCE,
  127. 0xCB, 0xB6, 0x40, 0x68, 0x37, 0xBF, 0x51, 0xF5},
  128. .yg_size = 32U,
  129. },
  130. #endif
  131. #if PKA_USE_BRAINPOOL_P256R1
  132. [PKA_BRAINPOOL_P256R1] = {
  133. .p_len = 256,
  134. .n_len = 256,
  135. .p = (uint8_t[]){0xA9, 0xFB, 0x57, 0xDB, 0xA1, 0xEE, 0xA9, 0xBC,
  136. 0x3E, 0x66, 0x0A, 0x90, 0x9D, 0x83, 0x8D, 0x72,
  137. 0x6E, 0x3B, 0xF6, 0x23, 0xD5, 0x26, 0x20, 0x28,
  138. 0x20, 0x13, 0x48, 0x1D, 0x1F, 0x6E, 0x53, 0x77},
  139. .n = (uint8_t[]){0xA9, 0xFB, 0x57, 0xDB, 0xA1, 0xEE, 0xA9, 0xBC,
  140. 0x3E, 0x66, 0x0A, 0x90, 0x9D, 0x83, 0x8D, 0x71,
  141. 0x8C, 0x39, 0x7A, 0xA3, 0xB5, 0x61, 0xA6, 0xF7,
  142. 0x90, 0x1E, 0x0E, 0x82, 0x97, 0x48, 0x56, 0xA7},
  143. .a = (uint8_t[]){0x7D, 0x5A, 0x09, 0x75, 0xFC, 0x2C, 0x30, 0x57,
  144. 0xEE, 0xF6, 0x75, 0x30, 0x41, 0x7A, 0xFF, 0xE7,
  145. 0xFB, 0x80, 0x55, 0xC1, 0x26, 0xDC, 0x5C, 0x6C,
  146. 0xE9, 0x4A, 0x4B, 0x44, 0xF3, 0x30, 0xB5, 0xD9},
  147. .a_size = 32U,
  148. .xg = (uint8_t[]){0x8B, 0xD2, 0xAE, 0xB9, 0xCB, 0x7E, 0x57, 0xCB,
  149. 0x2C, 0x4B, 0x48, 0x2F, 0xFC, 0x81, 0xB7, 0xAF,
  150. 0xB9, 0xDE, 0x27, 0xE1, 0xE3, 0xBD, 0x23, 0xC2,
  151. 0x3A, 0x44, 0x53, 0xBD, 0x9A, 0xCE, 0x32, 0x62},
  152. .xg_size = 32U,
  153. .yg = (uint8_t[]){0x54, 0x7E, 0xF8, 0x35, 0xC3, 0xDA, 0xC4, 0xFD,
  154. 0x97, 0xF8, 0x46, 0x1A, 0x14, 0x61, 0x1D, 0xC9,
  155. 0xC2, 0x77, 0x45, 0x13, 0x2D, 0xED, 0x8E, 0x54,
  156. 0x5C, 0x1D, 0x54, 0xC7, 0x2F, 0x04, 0x69, 0x97},
  157. .yg_size = 32U,
  158. },
  159. #endif
  160. #if PKA_USE_BRAINPOOL_P256T1
  161. [PKA_BRAINPOOL_P256T1] = {
  162. .p_len = 256,
  163. .n_len = 256,
  164. .p = (uint8_t[]){0xA9, 0xFB, 0x57, 0xDB, 0xA1, 0xEE, 0xA9, 0xBC,
  165. 0x3E, 0x66, 0x0A, 0x90, 0x9D, 0x83, 0x8D, 0x72,
  166. 0x6E, 0x3B, 0xF6, 0x23, 0xD5, 0x26, 0x20, 0x28,
  167. 0x20, 0x13, 0x48, 0x1D, 0x1F, 0x6E, 0x53, 0x77},
  168. .n = (uint8_t[]){0xA9, 0xFB, 0x57, 0xDB, 0xA1, 0xEE, 0xA9, 0xBC,
  169. 0x3E, 0x66, 0x0A, 0x90, 0x9D, 0x83, 0x8D, 0x71,
  170. 0x8C, 0x39, 0x7A, 0xA3, 0xB5, 0x61, 0xA6, 0xF7,
  171. 0x90, 0x1E, 0x0E, 0x82, 0x97, 0x48, 0x56, 0xA7},
  172. .a = (uint8_t[]){0xA9, 0xFB, 0x57, 0xDB, 0xA1, 0xEE, 0xA9, 0xBC,
  173. 0x3E, 0x66, 0x0A, 0x90, 0x9D, 0x83, 0x8D, 0x72,
  174. 0x6E, 0x3B, 0xF6, 0x23, 0xD5, 0x26, 0x20, 0x28,
  175. 0x20, 0x13, 0x48, 0x1D, 0x1F, 0x6E, 0x53, 0x74},
  176. .a_size = 32U,
  177. .xg = (uint8_t[]){0xA3, 0xE8, 0xEB, 0x3C, 0xC1, 0xCF, 0xE7, 0xB7,
  178. 0x73, 0x22, 0x13, 0xB2, 0x3A, 0x65, 0x61, 0x49,
  179. 0xAF, 0xA1, 0x42, 0xC4, 0x7A, 0xAF, 0xBC, 0x2B,
  180. 0x79, 0xA1, 0x91, 0x56, 0x2E, 0x13, 0x05, 0xF4},
  181. .xg_size = 32U,
  182. .yg = (uint8_t[]){0x2D, 0x99, 0x6C, 0x82, 0x34, 0x39, 0xC5, 0x6D,
  183. 0x7F, 0x7B, 0x22, 0xE1, 0x46, 0x44, 0x41, 0x7E,
  184. 0x69, 0xBC, 0xB6, 0xDE, 0x39, 0xD0, 0x27, 0x00,
  185. 0x1D, 0xAB, 0xE8, 0xF3, 0x5B, 0x25, 0xC9, 0xBE},
  186. .yg_size = 32U,
  187. },
  188. #endif
  189. #if PKA_USE_NIST_P521
  190. [PKA_NIST_P521] = {
  191. .p_len = 521,
  192. .n_len = 521,
  193. .p = (uint8_t[]){ 0x01, 0xff,
  194. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  195. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  196. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  197. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  198. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  199. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  200. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  201. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
  202. .n = (uint8_t[]){ 0x01, 0xff,
  203. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  204. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  205. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  206. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa,
  207. 0x51, 0x86, 0x87, 0x83, 0xbf, 0x2f, 0x96, 0x6b,
  208. 0x7f, 0xcc, 0x01, 0x48, 0xf7, 0x09, 0xa5, 0xd0,
  209. 0x3b, 0xb5, 0xc9, 0xb8, 0x89, 0x9c, 0x47, 0xae,
  210. 0xbb, 0x6f, 0xb7, 0x1e, 0x91, 0x38, 0x64, 0x09},
  211. .a_sign = 1,
  212. .a = (uint8_t[]){0x03},
  213. .a_size = 1U,
  214. .xg = (uint8_t[]){ 0xc6,
  215. 0x85, 0x8e, 0x06, 0xb7, 0x04, 0x04, 0xe9, 0xcd,
  216. 0x9e, 0x3e, 0xcb, 0x66, 0x23, 0x95, 0xb4, 0x42,
  217. 0x9c, 0x64, 0x81, 0x39, 0x05, 0x3f, 0xb5, 0x21,
  218. 0xf8, 0x28, 0xaf, 0x60, 0x6b, 0x4d, 0x3d, 0xba,
  219. 0xa1, 0x4b, 0x5e, 0x77, 0xef, 0xe7, 0x59, 0x28,
  220. 0xfe, 0x1d, 0xc1, 0x27, 0xa2, 0xff, 0xa8, 0xde,
  221. 0x33, 0x48, 0xb3, 0xc1, 0x85, 0x6a, 0x42, 0x9b,
  222. 0xf9, 0x7e, 0x7e, 0x31, 0xc2, 0xe5, 0xbd, 0x66},
  223. .xg_size = 65U,
  224. .yg = (uint8_t[]){ 0x01, 0x18,
  225. 0x39, 0x29, 0x6a, 0x78, 0x9a, 0x3b, 0xc0, 0x04,
  226. 0x5c, 0x8a, 0x5f, 0xb4, 0x2c, 0x7d, 0x1b, 0xd9,
  227. 0x98, 0xf5, 0x44, 0x49, 0x57, 0x9b, 0x44, 0x68,
  228. 0x17, 0xaf, 0xbd, 0x17, 0x27, 0x3e, 0x66, 0x2c,
  229. 0x97, 0xee, 0x72, 0x99, 0x5e, 0xf4, 0x26, 0x40,
  230. 0xc5, 0x50, 0xb9, 0x01, 0x3f, 0xad, 0x07, 0x61,
  231. 0x35, 0x3c, 0x70, 0x86, 0xa2, 0x72, 0xc2, 0x40,
  232. 0x88, 0xbe, 0x94, 0x76, 0x9f, 0xd1, 0x66, 0x50},
  233. .yg_size = 66U,
  234. },
  235. #endif
  236. };
  237. static struct stm32_pka_platdata pka_pdata;
  238. static int stm32_pka_parse_fdt(void)
  239. {
  240. int node;
  241. struct dt_node_info info;
  242. void *fdt;
  243. if (fdt_get_address(&fdt) == 0) {
  244. return -FDT_ERR_NOTFOUND;
  245. }
  246. node = dt_get_node(&info, -1, DT_PKA_COMPAT);
  247. if (node < 0) {
  248. ERROR("No PKA entry in DT\n");
  249. return -FDT_ERR_NOTFOUND;
  250. }
  251. if (info.status == DT_DISABLED) {
  252. return -FDT_ERR_NOTFOUND;
  253. }
  254. if ((info.base == 0) || (info.clock < 0) || (info.reset < 0)) {
  255. return -FDT_ERR_BADVALUE;
  256. }
  257. pka_pdata.base = (uintptr_t)info.base;
  258. pka_pdata.clock_id = (unsigned long)info.clock;
  259. pka_pdata.reset_id = (unsigned int)info.reset;
  260. return 0;
  261. }
  262. static int pka_wait_bit(uintptr_t base, uint32_t bit)
  263. {
  264. uint64_t timeout = timeout_init_us(PKA_TIMEOUT_US);
  265. while ((mmio_read_32(base + _PKA_SR) & bit) != bit) {
  266. if (timeout_elapsed(timeout)) {
  267. WARN("timeout waiting %x\n", bit);
  268. return -ETIMEDOUT;
  269. }
  270. }
  271. return 0;
  272. }
  273. static void pka_disable(uintptr_t base)
  274. {
  275. mmio_clrbits_32(base + _PKA_CR, _PKA_CR_EN);
  276. }
  277. static int pka_enable(uintptr_t base, uint32_t mode)
  278. {
  279. /* Set mode and disable interrupts */
  280. mmio_clrsetbits_32(base + _PKA_CR, _PKA_IT_MASK | _PKA_CR_MODE_MASK,
  281. _PKA_CR_MODE_MASK & (mode << _PKA_CR_MODE_SHIFT));
  282. mmio_setbits_32(base + _PKA_CR, _PKA_CR_EN);
  283. return pka_wait_bit(base, _PKA_SR_INITOK);
  284. }
  285. /*
  286. * Data are already loaded in PKA internal RAM
  287. * MODE is set
  288. * We start process, and wait for its end.
  289. */
  290. static int stm32_pka_process(uintptr_t base)
  291. {
  292. mmio_setbits_32(base + _PKA_CR, _PKA_CR_START);
  293. return pka_wait_bit(base, _PKA_IT_PROCEND);
  294. }
  295. /**
  296. * @brief Write ECC operand to PKA RAM.
  297. * @note PKA expect to write u64 word, each u64 are: the least significant bit is
  298. * bit 0; the most significant bit is bit 63.
  299. * We write eo_nbw (ECC operand Size) u64, value that depends of the chosen
  300. * prime modulus length in bits.
  301. * First less signicant u64 is written to low address
  302. * Most significant u64 to higher address.
  303. * And at last address we write a u64(0x0)
  304. * @note This function doesn't only manage endianness (as bswap64 do), but also
  305. * complete most significant incomplete u64 with 0 (if data is not a u64
  306. * multiple), and fill u64 last address with 0.
  307. * @param addr: PKA_RAM address to write the buffer 'data'
  308. * @param data: is a BYTE list with most significant bytes first
  309. * @param data_size: nb of byte in data
  310. * @param eo_nbw: is ECC Operand size in 64bits word (including the extra 0)
  311. * (note it depends of the prime modulus length, not the data size)
  312. * @retval 0 if OK.
  313. * -EINVAL if data_size and eo_nbw are inconsistent, ie data doesn't
  314. * fit in defined eo_nbw, or eo_nbw bigger than hardware limit.
  315. */
  316. static int write_eo_data(uintptr_t addr, uint8_t *data, unsigned int data_size,
  317. unsigned int eo_nbw)
  318. {
  319. uint32_t word_index;
  320. int data_index;
  321. if ((eo_nbw < OP_NBW_FROM_SIZE(data_size)) || (eo_nbw > MAX_EO_NBW)) {
  322. return -EINVAL;
  323. }
  324. /* Fill value */
  325. data_index = (int)data_size - 1;
  326. for (word_index = 0U; word_index < eo_nbw; word_index++) {
  327. uint64_t tmp = 0ULL;
  328. unsigned int i = 0U; /* index in the tmp U64 word */
  329. /* Stop if end of tmp or end of data */
  330. while ((i < sizeof(tmp)) && (data_index >= 0)) {
  331. tmp |= (uint64_t)(data[data_index]) << (UINT8_LEN * i);
  332. i++; /* Move byte index in current (u64)tmp */
  333. data_index--; /* Move to just next most significat byte */
  334. }
  335. mmio_write_64(addr + word_index * sizeof(tmp), tmp);
  336. }
  337. return 0;
  338. }
  339. static unsigned int get_ecc_op_nbword(enum stm32_pka_ecdsa_curve_id cid)
  340. {
  341. if (cid >= ARRAY_SIZE(curve_def)) {
  342. ERROR("CID %u is out of boundaries\n", cid);
  343. panic();
  344. }
  345. return OP_NBW_FROM_LEN(curve_def[cid].n_len);
  346. }
  347. static int stm32_pka_ecdsa_verif_configure_curve(uintptr_t base, enum stm32_pka_ecdsa_curve_id cid)
  348. {
  349. int ret;
  350. unsigned int eo_nbw = get_ecc_op_nbword(cid);
  351. mmio_write_64(base + _PKA_RAM_N_LEN, curve_def[cid].n_len);
  352. mmio_write_64(base + _PKA_RAM_P_LEN, curve_def[cid].p_len);
  353. mmio_write_64(base + _PKA_RAM_A_SIGN, curve_def[cid].a_sign);
  354. ret = write_eo_data(base + _PKA_RAM_A, curve_def[cid].a, curve_def[cid].a_size, eo_nbw);
  355. if (ret < 0) {
  356. return ret;
  357. }
  358. ret = write_eo_data(base + _PKA_RAM_PRIME_N,
  359. curve_def[cid].n, div_round_up(curve_def[cid].n_len, UINT8_LEN),
  360. eo_nbw);
  361. if (ret < 0) {
  362. return ret;
  363. }
  364. ret = write_eo_data(base + _PKA_RAM_P, curve_def[cid].p,
  365. div_round_up(curve_def[cid].p_len, UINT8_LEN), eo_nbw);
  366. if (ret < 0) {
  367. return ret;
  368. }
  369. ret = write_eo_data(base + _PKA_RAM_XG, curve_def[cid].xg, curve_def[cid].xg_size, eo_nbw);
  370. if (ret < 0) {
  371. return ret;
  372. }
  373. ret = write_eo_data(base + _PKA_RAM_YG, curve_def[cid].yg, curve_def[cid].yg_size, eo_nbw);
  374. if (ret < 0) {
  375. return ret;
  376. }
  377. return 0;
  378. }
  379. static int stm32_pka_ecdsa_verif_check_return(uintptr_t base)
  380. {
  381. uint64_t value;
  382. uint32_t sr;
  383. sr = mmio_read_32(base + _PKA_SR);
  384. if ((sr & (_PKA_IT_OPERR | _PKA_IT_ADDRERR | _PKA_IT_RAMERR)) != 0) {
  385. WARN("Detected error(s): %s%s%s\n",
  386. (sr & _PKA_IT_OPERR) ? "Operation " : "",
  387. (sr & _PKA_IT_ADDRERR) ? "Address " : "",
  388. (sr & _PKA_IT_RAMERR) ? "RAM" : "");
  389. return -EINVAL;
  390. }
  391. value = mmio_read_64(base + _PKA_RAM_ECDSA_VERIFY);
  392. if (value == _PKA_RAM_ECDSA_VERIFY_VALID) {
  393. return 0;
  394. }
  395. if (value == _PKA_RAM_ECDSA_VERIFY_INVALID) {
  396. return -EAUTH;
  397. }
  398. return -EINVAL;
  399. }
  400. /**
  401. * @brief Check if BigInt stored in data is 0
  402. *
  403. * @param data: a BYTE array with most significant bytes first
  404. * @param size: data size
  405. *
  406. * @retval: true: if data represents a 0 value (ie all bytes == 0)
  407. * false: if data represents a non-zero value.
  408. */
  409. static bool is_zero(uint8_t *data, unsigned int size)
  410. {
  411. unsigned int i;
  412. for (i = 0U; i < size; i++) {
  413. if (data[i] != 0U) {
  414. return false;
  415. }
  416. }
  417. return true;
  418. }
  419. /**
  420. * @brief Compare two BigInt:
  421. * @param xdata_a: a BYTE array with most significant bytes first
  422. * @param size_a: nb of Byte of 'a'
  423. * @param data_b: a BYTE array with most significant bytes first
  424. * @param size_b: nb of Byte of 'b'
  425. *
  426. * @retval: true if data_a < data_b
  427. * false if data_a >= data_b
  428. */
  429. static bool is_smaller(uint8_t *data_a, unsigned int size_a,
  430. uint8_t *data_b, unsigned int size_b)
  431. {
  432. unsigned int i;
  433. i = MAX(size_a, size_b) + 1U;
  434. do {
  435. uint8_t a, b;
  436. i--;
  437. if (size_a < i) {
  438. a = 0U;
  439. } else {
  440. a = data_a[size_a - i];
  441. }
  442. if (size_b < i) {
  443. b = 0U;
  444. } else {
  445. b = data_b[size_b - i];
  446. }
  447. if (a < b) {
  448. return true;
  449. }
  450. if (a > b) {
  451. return false;
  452. }
  453. } while (i != 0U);
  454. return false;
  455. }
  456. static int stm32_pka_ecdsa_check_param(void *sig_r_ptr, unsigned int sig_r_size,
  457. void *sig_s_ptr, unsigned int sig_s_size,
  458. void *pk_x_ptr, unsigned int pk_x_size,
  459. void *pk_y_ptr, unsigned int pk_y_size,
  460. enum stm32_pka_ecdsa_curve_id cid)
  461. {
  462. /* Public Key check */
  463. /* Check Xq < p */
  464. if (!is_smaller(pk_x_ptr, pk_x_size,
  465. curve_def[cid].p, div_round_up(curve_def[cid].p_len, UINT8_LEN))) {
  466. WARN("%s Xq < p inval\n", __func__);
  467. return -EINVAL;
  468. }
  469. /* Check Yq < p */
  470. if (!is_smaller(pk_y_ptr, pk_y_size,
  471. curve_def[cid].p, div_round_up(curve_def[cid].p_len, UINT8_LEN))) {
  472. WARN("%s Yq < p inval\n", __func__);
  473. return -EINVAL;
  474. }
  475. /* Signature check */
  476. /* Check 0 < r < n */
  477. if (!is_smaller(sig_r_ptr, sig_r_size,
  478. curve_def[cid].n, div_round_up(curve_def[cid].n_len, UINT8_LEN)) &&
  479. !is_zero(sig_r_ptr, sig_r_size)) {
  480. WARN("%s 0< r < n inval\n", __func__);
  481. return -EINVAL;
  482. }
  483. /* Check 0 < s < n */
  484. if (!is_smaller(sig_s_ptr, sig_s_size,
  485. curve_def[cid].n, div_round_up(curve_def[cid].n_len, UINT8_LEN)) &&
  486. !is_zero(sig_s_ptr, sig_s_size)) {
  487. WARN("%s 0< s < n inval\n", __func__);
  488. return -EINVAL;
  489. }
  490. return 0;
  491. }
  492. /*
  493. * @brief Initialize the PKA driver.
  494. * @param None.
  495. * @retval 0 if OK, negative value else.
  496. */
  497. int stm32_pka_init(void)
  498. {
  499. int err;
  500. #if LOG_LEVEL >= LOG_LEVEL_VERBOSE
  501. uint32_t ver;
  502. uint32_t id;
  503. #endif
  504. err = stm32_pka_parse_fdt();
  505. if (err != 0) {
  506. return err;
  507. }
  508. clk_enable(pka_pdata.clock_id);
  509. if (stm32mp_reset_assert((unsigned long)pka_pdata.reset_id, TIMEOUT_US_1MS) != 0) {
  510. panic();
  511. }
  512. udelay(PKA_RESET_DELAY);
  513. if (stm32mp_reset_deassert((unsigned long)pka_pdata.reset_id, TIMEOUT_US_1MS) != 0) {
  514. panic();
  515. }
  516. #if LOG_LEVEL >= LOG_LEVEL_VERBOSE
  517. id = mmio_read_32(pka_pdata.base + _PKA_IPIDR);
  518. ver = mmio_read_32(pka_pdata.base + _PKA_VERR);
  519. VERBOSE("STM32 PKA[%x] V%u.%u\n", id,
  520. (ver & _PKA_VERR_MAJREV_MASK) >> _PKA_VERR_MAJREV_SHIFT,
  521. (ver & _PKA_VERR_MINREV_MASK) >> _PKA_VERR_MINREV_SHIFT);
  522. #endif
  523. return 0;
  524. }
  525. int stm32_pka_ecdsa_verif(void *hash, unsigned int hash_size,
  526. void *sig_r_ptr, unsigned int sig_r_size,
  527. void *sig_s_ptr, unsigned int sig_s_size,
  528. void *pk_x_ptr, unsigned int pk_x_size,
  529. void *pk_y_ptr, unsigned int pk_y_size,
  530. enum stm32_pka_ecdsa_curve_id cid)
  531. {
  532. int ret;
  533. uintptr_t base = pka_pdata.base;
  534. unsigned int eo_nbw = get_ecc_op_nbword(cid);
  535. if ((hash == NULL) || (sig_r_ptr == NULL) || (sig_s_ptr == NULL) ||
  536. (pk_x_ptr == NULL) || (pk_y_ptr == NULL)) {
  537. INFO("%s invalid input param\n", __func__);
  538. return -EINVAL;
  539. }
  540. ret = stm32_pka_ecdsa_check_param(sig_r_ptr, sig_r_size,
  541. sig_s_ptr, sig_s_size,
  542. pk_x_ptr, pk_x_size,
  543. pk_y_ptr, pk_y_size,
  544. cid);
  545. if (ret < 0) {
  546. INFO("%s check param error %d\n", __func__, ret);
  547. goto out;
  548. }
  549. if ((mmio_read_32(base + _PKA_SR) & _PKA_SR_BUSY) == _PKA_SR_BUSY) {
  550. INFO("%s busy\n", __func__);
  551. ret = -EBUSY;
  552. goto out;
  553. }
  554. /* Fill PKA RAM */
  555. /* With curve id values */
  556. ret = stm32_pka_ecdsa_verif_configure_curve(base, cid);
  557. if (ret < 0) {
  558. goto out;
  559. }
  560. /* With pubkey */
  561. ret = write_eo_data(base + _PKA_RAM_XQ, pk_x_ptr, pk_x_size, eo_nbw);
  562. if (ret < 0) {
  563. goto out;
  564. }
  565. ret = write_eo_data(base + _PKA_RAM_YQ, pk_y_ptr, pk_y_size, eo_nbw);
  566. if (ret < 0) {
  567. goto out;
  568. }
  569. /* With hash */
  570. ret = write_eo_data(base + _PKA_RAM_HASH_Z, hash, hash_size, eo_nbw);
  571. if (ret < 0) {
  572. goto out;
  573. }
  574. /* With signature */
  575. ret = write_eo_data(base + _PKA_RAM_SIGN_R, sig_r_ptr, sig_r_size, eo_nbw);
  576. if (ret < 0) {
  577. goto out;
  578. }
  579. ret = write_eo_data(base + _PKA_RAM_SIGN_S, sig_s_ptr, sig_s_size, eo_nbw);
  580. if (ret < 0) {
  581. goto out;
  582. }
  583. /* Set mode to ecdsa signature verification */
  584. ret = pka_enable(base, _PKA_CR_MODE_ECDSA_VERIF);
  585. if (ret < 0) {
  586. WARN("%s set mode pka error %d\n", __func__, ret);
  587. goto out;
  588. }
  589. /* Start processing and wait end */
  590. ret = stm32_pka_process(base);
  591. if (ret < 0) {
  592. WARN("%s process error %d\n", __func__, ret);
  593. goto out;
  594. }
  595. /* Check return status */
  596. ret = stm32_pka_ecdsa_verif_check_return(base);
  597. /* Unset end proc */
  598. mmio_setbits_32(base + _PKA_CLRFR, _PKA_IT_PROCEND);
  599. out:
  600. /* Disable PKA (will stop all pending proccess and reset RAM) */
  601. pka_disable(base);
  602. return ret;
  603. }