plat_macros.S 2.0 KB

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  1. /*
  2. * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <drivers/arm/cci.h>
  7. #include <drivers/arm/gic_common.h>
  8. #include <drivers/arm/gicv2.h>
  9. #include <platform_def.h>
  10. .section .rodata.gic_reg_name, "aS"
  11. gicc_regs:
  12. .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
  13. gicd_pend_reg:
  14. .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n" \
  15. " Offset:\t\t\tvalue\n"
  16. newline:
  17. .asciz "\n"
  18. spacer:
  19. .asciz ":\t\t0x"
  20. .section .rodata.cci_reg_name, "aS"
  21. cci_iface_regs:
  22. .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
  23. /* ---------------------------------------------
  24. * The below macro prints out relevant GIC and
  25. * CCI registers whenever an unhandled exception
  26. * is taken in BL31.
  27. * Clobbers: x0 - x10, x26, x27, sp
  28. * ---------------------------------------------
  29. */
  30. .macro plat_crash_print_regs
  31. mov_imm x26, BASE_GICD_BASE
  32. mov_imm x27, BASE_GICC_BASE
  33. /* Load the gicc reg list to x6 */
  34. adr x6, gicc_regs
  35. /* Load the gicc regs to gp regs used by str_in_crash_buf_print */
  36. ldr w8, [x27, #GICC_HPPIR]
  37. ldr w9, [x27, #GICC_AHPPIR]
  38. ldr w10, [x27, #GICC_CTLR]
  39. /* Store to the crash buf and print to console */
  40. bl str_in_crash_buf_print
  41. /* Print the GICD_ISPENDR regs */
  42. add x7, x26, #GICD_ISPENDR
  43. adr x4, gicd_pend_reg
  44. bl asm_print_str
  45. gicd_ispendr_loop:
  46. sub x4, x7, x26
  47. cmp x4, #0x280
  48. b.eq exit_print_gic_regs
  49. bl asm_print_hex
  50. adr x4, spacer
  51. bl asm_print_str
  52. ldr x4, [x7], #8
  53. bl asm_print_hex
  54. adr x4, newline
  55. bl asm_print_str
  56. b gicd_ispendr_loop
  57. exit_print_gic_regs:
  58. adr x6, cci_iface_regs
  59. /* Store in x7 the base address of the first interface */
  60. mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
  61. PLAT_MT_CCI_CLUSTER0_SL_IFACE_IX))
  62. ldr w8, [x7, #SNOOP_CTRL_REG]
  63. /* Store in x7 the base address of the second interface */
  64. mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
  65. PLAT_MT_CCI_CLUSTER1_SL_IFACE_IX))
  66. ldr w9, [x7, #SNOOP_CTRL_REG]
  67. /* Store to the crash buf and print to console */
  68. bl str_in_crash_buf_print
  69. .endm