bl1_context_mgmt.c 2.6 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495
  1. /*
  2. * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <assert.h>
  7. #include <arch_helpers.h>
  8. #include <context.h>
  9. #include <common/debug.h>
  10. #include <lib/el3_runtime/context_mgmt.h>
  11. #include <plat/common/platform.h>
  12. #include "../bl1_private.h"
  13. /* Following contains the cpu context pointers. */
  14. static void *bl1_cpu_context_ptr[2];
  15. void *cm_get_context(uint32_t security_state)
  16. {
  17. assert(sec_state_is_valid(security_state));
  18. return bl1_cpu_context_ptr[security_state];
  19. }
  20. void cm_set_context(void *context, uint32_t security_state)
  21. {
  22. assert(sec_state_is_valid(security_state));
  23. bl1_cpu_context_ptr[security_state] = context;
  24. }
  25. /*******************************************************************************
  26. * This function prepares the context for Secure/Normal world images.
  27. * Normal world images are transitioned to EL2(if supported) else EL1.
  28. ******************************************************************************/
  29. void bl1_prepare_next_image(unsigned int image_id)
  30. {
  31. /*
  32. * Following array will be used for context management.
  33. * There are 2 instances, for the Secure and Non-Secure contexts.
  34. */
  35. static cpu_context_t bl1_cpu_context[2];
  36. unsigned int security_state, mode = MODE_EL1;
  37. image_desc_t *desc;
  38. entry_point_info_t *next_bl_ep;
  39. #if CTX_INCLUDE_AARCH32_REGS
  40. /*
  41. * Ensure that the build flag to save AArch32 system registers in CPU
  42. * context is not set for AArch64-only platforms.
  43. */
  44. if (el_implemented(1) == EL_IMPL_A64ONLY) {
  45. ERROR("EL1 supports AArch64-only. Please set build flag "
  46. "CTX_INCLUDE_AARCH32_REGS = 0\n");
  47. panic();
  48. }
  49. #endif
  50. /* Get the image descriptor. */
  51. desc = bl1_plat_get_image_desc(image_id);
  52. assert(desc != NULL);
  53. /* Get the entry point info. */
  54. next_bl_ep = &desc->ep_info;
  55. /* Get the image security state. */
  56. security_state = GET_SECURITY_STATE(next_bl_ep->h.attr);
  57. /* Setup the Secure/Non-Secure context if not done already. */
  58. if (cm_get_context(security_state) == NULL)
  59. cm_set_context(&bl1_cpu_context[security_state], security_state);
  60. /* Prepare the SPSR for the next BL image. */
  61. if ((security_state != SECURE) && (el_implemented(2) != EL_IMPL_NONE)) {
  62. mode = MODE_EL2;
  63. }
  64. next_bl_ep->spsr = (uint32_t)SPSR_64((uint64_t) mode,
  65. (uint64_t)MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
  66. /* Allow platform to make change */
  67. bl1_plat_set_ep_info(image_id, next_bl_ep);
  68. /* Prepare the context for the next BL image. */
  69. cm_init_my_context(next_bl_ep);
  70. cm_prepare_el3_exit(security_state);
  71. /* Indicate that image is in execution state. */
  72. desc->state = IMAGE_STATE_EXECUTED;
  73. print_entry_point_info(next_bl_ep);
  74. }