fvp-base-gicv3-psci-aarch32-1t.dts 310 B

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  1. /*
  2. * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. /* Configuration: max 4 clusters with up to 4 CPUs with 1 thread per each */
  7. /dts-v1/;
  8. #define AFF 00
  9. #define REG_32
  10. #include "fvp-defs.dtsi"
  11. #include "fvp-base-gicv3-psci-aarch32-common.dtsi"