spi_nand.h 1.4 KB

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  1. /*
  2. * Copyright (c) 2019-2023, STMicroelectronics - All Rights Reserved
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef DRIVERS_SPI_NAND_H
  7. #define DRIVERS_SPI_NAND_H
  8. #include <drivers/nand.h>
  9. #include <drivers/spi_mem.h>
  10. #define SPI_NAND_OP_GET_FEATURE 0x0FU
  11. #define SPI_NAND_OP_SET_FEATURE 0x1FU
  12. #define SPI_NAND_OP_READ_ID 0x9FU
  13. #define SPI_NAND_OP_LOAD_PAGE 0x13U
  14. #define SPI_NAND_OP_RESET 0xFFU
  15. #define SPI_NAND_OP_READ_FROM_CACHE 0x03U
  16. #define SPI_NAND_OP_READ_FROM_CACHE_2X 0x3BU
  17. #define SPI_NAND_OP_READ_FROM_CACHE_4X 0x6BU
  18. /* Configuration register */
  19. #define SPI_NAND_REG_CFG 0xB0U
  20. #define SPI_NAND_CFG_ECC_EN BIT(4)
  21. #define SPI_NAND_CFG_QE BIT(0)
  22. /* Status register */
  23. #define SPI_NAND_REG_STATUS 0xC0U
  24. #define SPI_NAND_STATUS_BUSY BIT(0)
  25. #define SPI_NAND_STATUS_ECC_UNCOR BIT(5)
  26. /* Flags for specific configuration */
  27. #define SPI_NAND_HAS_QE_BIT BIT(0)
  28. struct spinand_device {
  29. struct nand_device *nand_dev;
  30. struct spi_mem_op spi_read_cache_op;
  31. uint32_t flags;
  32. uint8_t cfg_cache; /* Cached value of SPI NAND device register CFG */
  33. };
  34. int spi_nand_init(unsigned long long *size, unsigned int *erase_size);
  35. /*
  36. * Platform can implement this to override default SPI-NAND instance
  37. * configuration.
  38. *
  39. * @device: target SPI-NAND instance.
  40. * Return 0 on success, negative value otherwise.
  41. */
  42. int plat_get_spi_nand_data(struct spinand_device *device);
  43. #endif /* DRIVERS_SPI_NAND_H */