stm32_uart.h 5.2 KB

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  1. /*
  2. * Copyright (c) 2021-2022, STMicroelectronics - All Rights Reserved
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef STM32_UART_H
  7. #define STM32_UART_H
  8. /* UART word length */
  9. #define STM32_UART_WORDLENGTH_7B USART_CR1_M1
  10. #define STM32_UART_WORDLENGTH_8B 0x00000000U
  11. #define STM32_UART_WORDLENGTH_9B USART_CR1_M0
  12. /* UART number of stop bits */
  13. #define STM32_UART_STOPBITS_0_5 USART_CR2_STOP_0
  14. #define STM32_UART_STOPBITS_1 0x00000000U
  15. #define STM32_UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1)
  16. #define STM32_UART_STOPBITS_2 USART_CR2_STOP_1
  17. /* UART parity */
  18. #define STM32_UART_PARITY_NONE 0x00000000U
  19. #define STM32_UART_PARITY_EVEN USART_CR1_PCE
  20. #define STM32_UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS)
  21. /* UART transfer mode */
  22. #define STM32_UART_MODE_RX USART_CR1_RE
  23. #define STM32_UART_MODE_TX USART_CR1_TE
  24. #define STM32_UART_MODE_TX_RX (USART_CR1_TE | USART_CR1_RE)
  25. /* UART hardware flow control */
  26. #define STM32_UART_HWCONTROL_NONE 0x00000000U
  27. #define STM32_UART_HWCONTROL_RTS USART_CR3_RTSE
  28. #define STM32_UART_HWCONTROL_CTS USART_CR3_CTSE
  29. #define STM32_UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE)
  30. /* UART prescaler */
  31. #define STM32_UART_PRESCALER_DIV1 0x00000000U
  32. #define STM32_UART_PRESCALER_DIV2 0x00000001U
  33. #define STM32_UART_PRESCALER_DIV4 0x00000002U
  34. #define STM32_UART_PRESCALER_DIV6 0x00000003U
  35. #define STM32_UART_PRESCALER_DIV8 0x00000004U
  36. #define STM32_UART_PRESCALER_DIV10 0x00000005U
  37. #define STM32_UART_PRESCALER_DIV12 0x00000006U
  38. #define STM32_UART_PRESCALER_DIV16 0x00000007U
  39. #define STM32_UART_PRESCALER_DIV32 0x00000008U
  40. #define STM32_UART_PRESCALER_DIV64 0x00000009U
  41. #define STM32_UART_PRESCALER_DIV128 0x0000000AU
  42. #define STM32_UART_PRESCALER_DIV256 0x0000000BU
  43. #define STM32_UART_PRESCALER_NB 0x0000000CU
  44. /* UART fifo mode */
  45. #define STM32_UART_FIFOMODE_EN USART_CR1_FIFOEN
  46. #define STM32_UART_FIFOMODE_DIS 0x00000000U
  47. /* UART TXFIFO threshold level */
  48. #define STM32_UART_TXFIFO_THRESHOLD_1EIGHTHFULL 0x00000000U
  49. #define STM32_UART_TXFIFO_THRESHOLD_1QUARTERFUL USART_CR3_TXFTCFG_0
  50. #define STM32_UART_TXFIFO_THRESHOLD_HALFFULL USART_CR3_TXFTCFG_1
  51. #define STM32_UART_TXFIFO_THRESHOLD_3QUARTERSFULL (USART_CR3_TXFTCFG_0 | USART_CR3_TXFTCFG_1)
  52. #define STM32_UART_TXFIFO_THRESHOLD_7EIGHTHFULL USART_CR3_TXFTCFG_2
  53. #define STM32_UART_TXFIFO_THRESHOLD_EMPTY (USART_CR3_TXFTCFG_2 | USART_CR3_TXFTCFG_0)
  54. /* UART RXFIFO threshold level */
  55. #define STM32_UART_RXFIFO_THRESHOLD_1EIGHTHFULL 0x00000000U
  56. #define STM32_UART_RXFIFO_THRESHOLD_1QUARTERFULL USART_CR3_RXFTCFG_0
  57. #define STM32_UART_RXFIFO_THRESHOLD_HALFFULL USART_CR3_RXFTCFG_1
  58. #define STM32_UART_RXFIFO_THRESHOLD_3QUARTERSFULL (USART_CR3_RXFTCFG_0 | USART_CR3_RXFTCFG_1)
  59. #define STM32_UART_RXFIFO_THRESHOLD_7EIGHTHFULL USART_CR3_RXFTCFG_2
  60. #define STM32_UART_RXFIFO_THRESHOLD_FULL (USART_CR3_RXFTCFG_2 | USART_CR3_RXFTCFG_0)
  61. struct stm32_uart_init_s {
  62. uint32_t baud_rate; /*
  63. * Configures the UART communication
  64. * baud rate.
  65. */
  66. uint32_t word_length; /*
  67. * Specifies the number of data bits
  68. * transmitted or received in a frame.
  69. * This parameter can be a value of
  70. * @ref STM32_UART_WORDLENGTH_*.
  71. */
  72. uint32_t stop_bits; /*
  73. * Specifies the number of stop bits
  74. * transmitted. This parameter can be
  75. * a value of @ref STM32_UART_STOPBITS_*.
  76. */
  77. uint32_t parity; /*
  78. * Specifies the parity mode.
  79. * This parameter can be a value of
  80. * @ref STM32_UART_PARITY_*.
  81. */
  82. uint32_t mode; /*
  83. * Specifies whether the receive or
  84. * transmit mode is enabled or
  85. * disabled. This parameter can be a
  86. * value of @ref @ref STM32_UART_MODE_*.
  87. */
  88. uint32_t hw_flow_control; /*
  89. * Specifies whether the hardware flow
  90. * control mode is enabled or
  91. * disabled. This parameter can be a
  92. * value of @ref STM32_UARTHWCONTROL_*.
  93. */
  94. uint32_t one_bit_sampling; /*
  95. * Specifies whether a single sample
  96. * or three samples' majority vote is
  97. * selected. This parameter can be 0
  98. * or USART_CR3_ONEBIT.
  99. */
  100. uint32_t prescaler; /*
  101. * Specifies the prescaler value used
  102. * to divide the UART clock source.
  103. * This parameter can be a value of
  104. * @ref STM32_UART_PRESCALER_*.
  105. */
  106. uint32_t fifo_mode; /*
  107. * Specifies if the FIFO mode will be
  108. * used. This parameter can be a value
  109. * of @ref STM32_UART_FIFOMODE_*.
  110. */
  111. uint32_t tx_fifo_threshold; /*
  112. * Specifies the TXFIFO threshold
  113. * level. This parameter can be a
  114. * value of @ref
  115. * STM32_UART_TXFIFO_THRESHOLD_*.
  116. */
  117. uint32_t rx_fifo_threshold; /*
  118. * Specifies the RXFIFO threshold
  119. * level. This parameter can be a
  120. * value of @ref
  121. * STM32_UART_RXFIFO_THRESHOLD_*.
  122. */
  123. };
  124. struct stm32_uart_handle_s {
  125. uint32_t base;
  126. uint32_t rdr_mask;
  127. };
  128. int stm32_uart_init(struct stm32_uart_handle_s *huart,
  129. uintptr_t base_addr,
  130. const struct stm32_uart_init_s *init);
  131. void stm32_uart_stop(uintptr_t base_addr);
  132. int stm32_uart_putc(struct stm32_uart_handle_s *huart, int c);
  133. int stm32_uart_flush(struct stm32_uart_handle_s *huart);
  134. int stm32_uart_getc(struct stm32_uart_handle_s *huart);
  135. #endif /* STM32_UART_H */