nxp_gpio.c 3.0 KB

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  1. /*
  2. * Copyright 2021 NXP
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. */
  7. #include <common/debug.h>
  8. #include <lib/mmio.h>
  9. #include <nxp_gpio.h>
  10. static gpio_init_info_t *gpio_init_info;
  11. void gpio_init(gpio_init_info_t *gpio_init_data)
  12. {
  13. gpio_init_info = gpio_init_data;
  14. }
  15. /* This function set GPIO pin for raising POVDD. */
  16. int set_gpio_bit(uint32_t *gpio_base_addr,
  17. uint32_t bit_num)
  18. {
  19. uint32_t val = 0U;
  20. uint32_t *gpdir = NULL;
  21. uint32_t *gpdat = NULL;
  22. if (gpio_init_info == NULL) {
  23. ERROR("GPIO is not initialized.\n");
  24. return GPIO_FAILURE;
  25. }
  26. gpdir = gpio_base_addr + GPDIR_REG_OFFSET;
  27. gpdat = gpio_base_addr + (GPDAT_REG_OFFSET >> 2);
  28. /*
  29. * Set the corresponding bit in direction register
  30. * to configure the GPIO as output.
  31. */
  32. val = gpio_read32(gpdir);
  33. val = val | bit_num;
  34. gpio_write32(gpdir, val);
  35. /* Set the corresponding bit in GPIO data register */
  36. val = gpio_read32(gpdat);
  37. val = val | bit_num;
  38. gpio_write32(gpdat, val);
  39. val = gpio_read32(gpdat);
  40. if ((val & bit_num) == 0U) {
  41. return GPIO_FAILURE;
  42. }
  43. return GPIO_SUCCESS;
  44. }
  45. /* This function reset GPIO pin set for raising POVDD. */
  46. int clr_gpio_bit(uint32_t *gpio_base_addr, uint32_t bit_num)
  47. {
  48. uint32_t val = 0U;
  49. uint32_t *gpdir = NULL;
  50. uint32_t *gpdat = NULL;
  51. if (gpio_init_info == NULL) {
  52. ERROR("GPIO is not initialized.\n");
  53. return GPIO_FAILURE;
  54. }
  55. gpdir = gpio_base_addr + GPDIR_REG_OFFSET;
  56. gpdat = gpio_base_addr + GPDAT_REG_OFFSET;
  57. /*
  58. * Reset the corresponding bit in direction and data register
  59. * to configure the GPIO as input.
  60. */
  61. val = gpio_read32(gpdat);
  62. val = val & ~(bit_num);
  63. gpio_write32(gpdat, val);
  64. val = gpio_read32(gpdat);
  65. val = gpio_read32(gpdir);
  66. val = val & ~(bit_num);
  67. gpio_write32(gpdir, val);
  68. val = gpio_read32(gpdat);
  69. if ((val & bit_num) != 0U) {
  70. return GPIO_FAILURE;
  71. }
  72. return GPIO_SUCCESS;
  73. }
  74. uint32_t *select_gpio_n_bitnum(uint32_t povdd_gpio, uint32_t *bit_num)
  75. {
  76. uint32_t *ret_gpio;
  77. uint32_t povdd_gpio_val = 0U;
  78. uint32_t gpio_num = 0U;
  79. if (gpio_init_info == NULL) {
  80. ERROR("GPIO is not initialized.\n");
  81. }
  82. /*
  83. * Subtract 1 from fuse_hdr povdd_gpio value as
  84. * for 0x1 value, bit 0 is to be set
  85. * for 0x20 value i.e 32, bit 31 i.e. 0x1f is to be set.
  86. * 0x1f - 0x00 : GPIO_1
  87. * 0x3f - 0x20 : GPIO_2
  88. * 0x5f - 0x40 : GPIO_3
  89. * 0x7f - 0x60 : GPIO_4
  90. */
  91. povdd_gpio_val = (povdd_gpio - 1U) & GPIO_SEL_MASK;
  92. /* Right shift by 5 to divide by 32 */
  93. gpio_num = povdd_gpio_val >> GPIO_ID_BASE_ADDR_SHIFT;
  94. *bit_num = 1U << (GPIO_BITS_PER_BASE_REG
  95. - (povdd_gpio_val & GPIO_BIT_MASK)
  96. - 1U);
  97. switch (gpio_num) {
  98. case GPIO_0:
  99. ret_gpio = (uint32_t *) gpio_init_info->gpio1_base_addr;
  100. break;
  101. case GPIO_1:
  102. ret_gpio = (uint32_t *) gpio_init_info->gpio2_base_addr;
  103. break;
  104. case GPIO_2:
  105. ret_gpio = (uint32_t *) gpio_init_info->gpio3_base_addr;
  106. break;
  107. case GPIO_3:
  108. ret_gpio = (uint32_t *) gpio_init_info->gpio4_base_addr;
  109. break;
  110. default:
  111. ret_gpio = NULL;
  112. }
  113. if (ret_gpio == NULL) {
  114. INFO("GPIO_NUM = %d doesn't exist.\n", gpio_num);
  115. }
  116. return ret_gpio;
  117. }